| /hal_nuvoton-latest/m48x/StdDriver/inc/ |
| D | crypto.h | 138 #define PRNG_ENABLE_INT(crpt) ((crpt)->INTEN |= CRPT_INTEN_PRNGIEN_Msk) 146 #define PRNG_DISABLE_INT(crpt) ((crpt)->INTEN &= ~CRPT_INTEN_PRNGIEN_Msk) 170 #define AES_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Msk… 178 #define AES_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Ms… 219 #define TDES_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_TDESIEN_Msk|CRPT_INTEN_TDESEIEN_M… 227 #define TDES_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_TDESIEN_Msk|CRPT_INTEN_TDESEIEN_… 268 #define SHA_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_HMACIEN_Msk|CRPT_INTEN_HMACEIEN_M… 276 #define SHA_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_HMACIEN_Msk|CRPT_INTEN_HMACEIEN_… 300 #define ECC_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_ECCIEN_Msk|CRPT_INTEN_ECCEIEN_Msk… 308 #define ECC_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_ECCIEN_Msk|CRPT_INTEN_ECCEIEN_Ms…
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| D | uart.h | 325 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel)) 348 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel)) 461 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel)) 474 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
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| D | otg.h | 169 #define OTG_ENABLE_INT(u32Mask) (OTG->INTEN |= (u32Mask)) 191 #define OTG_DISABLE_INT(u32Mask) (OTG->INTEN &= ~(u32Mask))
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| D | hsotg.h | 169 #define HSOTG_ENABLE_INT(u32Mask) (HSOTG->INTEN |= (u32Mask)) 191 #define HSOTG_DISABLE_INT(u32Mask) (HSOTG->INTEN &= ~(u32Mask))
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| /hal_nuvoton-latest/m46x/StdDriver/inc/ |
| D | crypto.h | 226 #define PRNG_ENABLE_INT(crpt) ((crpt)->INTEN |= CRPT_INTEN_PRNGIEN_Msk) 234 #define PRNG_DISABLE_INT(crpt) ((crpt)->INTEN &= ~CRPT_INTEN_PRNGIEN_Msk) 258 #define AES_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Msk… 266 #define AES_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Ms… 306 #define SHA_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_HMACIEN_Msk|CRPT_INTEN_HMACEIEN_M… 314 #define SHA_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_HMACIEN_Msk|CRPT_INTEN_HMACEIEN_… 338 #define ECC_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_ECCIEN_Msk|CRPT_INTEN_ECCEIEN_Msk… 346 #define ECC_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_ECCIEN_Msk|CRPT_INTEN_ECCEIEN_Ms… 370 #define RSA_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_RSAIEN_Msk|CRPT_INTEN_RSAEIEN_Msk… 378 #define RSA_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_RSAIEN_Msk|CRPT_INTEN_RSAEIEN_Ms…
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| D | uart.h | 344 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel)) 369 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel)) 492 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel)) 506 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
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| D | otg.h | 169 #define OTG_ENABLE_INT(u32Mask) (OTG->INTEN |= (u32Mask)) 191 #define OTG_DISABLE_INT(u32Mask) (OTG->INTEN &= ~(u32Mask))
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| D | hsotg.h | 177 #define HSOTG_ENABLE_INT(u32Mask) (HSOTG->INTEN |= (u32Mask)) 199 #define HSOTG_DISABLE_INT(u32Mask) (HSOTG->INTEN &= ~(u32Mask))
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| /hal_nuvoton-latest/m2l31x/StdDriver/inc/ |
| D | crypto.h | 85 #define PRNG_ENABLE_INT(crpt) ((crpt)->INTEN |= CRPT_INTEN_PRNGIEN_Msk) 93 #define PRNG_DISABLE_INT(crpt) ((crpt)->INTEN &= ~CRPT_INTEN_PRNGIEN_Msk) 117 #define AES_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Msk… 125 #define AES_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Ms…
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| D | lpuart.h | 323 #define LPUART_ENABLE_INT(lpuart, u32eIntSel) ((lpuart)->INTEN |= (u32eIntSel)) 346 #define LPUART_DISABLE_INT(lpuart, u32eIntSel) ((lpuart)->INTEN &= ~ (u32eIntSel)) 463 #define LPUART_PDMA_ENABLE(lpuart, u32FuncSel) ((lpuart)->INTEN |= (u32FuncSel)) 478 #define LPUART_PDMA_DISABLE(lpuart, u32FuncSel) ((lpuart)->INTEN &= ~(u32FuncSel))
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| D | uart.h | 342 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel)) 367 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel)) 490 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel)) 504 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
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| D | otg.h | 169 #define OTG_ENABLE_INT(u32Mask) (OTG->INTEN |= (u32Mask)) 191 #define OTG_DISABLE_INT(u32Mask) (OTG->INTEN &= ~(u32Mask))
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| /hal_nuvoton-latest/m46x/StdDriver/src/ |
| D | usci_spi.c | 269 uspi->INTEN |= USPI_INTEN_TXSTIEN_Msk; in USPI_EnableInt() 276 uspi->INTEN |= USPI_INTEN_TXENDIEN_Msk; in USPI_EnableInt() 283 uspi->INTEN |= USPI_INTEN_RXSTIEN_Msk; in USPI_EnableInt() 290 uspi->INTEN |= USPI_INTEN_RXENDIEN_Msk; in USPI_EnableInt() 360 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk; in USPI_DisableInt() 367 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk; in USPI_DisableInt() 374 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk; in USPI_DisableInt() 381 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk; in USPI_DisableInt()
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| D | gpio.c | 84 …port->INTEN = (port->INTEN & ~(0x00010001ul << u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt() 109 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
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| D | usci_uart.c | 229 uuart->INTEN &= ~UUART_INTEN_TXSTIEN_Msk; in UUART_DisableInt() 235 uuart->INTEN &= ~UUART_INTEN_TXENDIEN_Msk; in UUART_DisableInt() 241 uuart->INTEN &= ~UUART_INTEN_RXSTIEN_Msk; in UUART_DisableInt() 247 uuart->INTEN &= ~UUART_INTEN_RXENDIEN_Msk; in UUART_DisableInt() 294 uuart->INTEN |= UUART_INTEN_TXSTIEN_Msk; in UUART_EnableInt() 300 uuart->INTEN |= UUART_INTEN_TXENDIEN_Msk; in UUART_EnableInt() 306 uuart->INTEN |= UUART_INTEN_RXSTIEN_Msk; in UUART_EnableInt() 312 uuart->INTEN |= UUART_INTEN_RXENDIEN_Msk; in UUART_EnableInt()
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| D | bmc.c | 126 BMC->INTEN |= BMC_INTEN_FTXDIEN_Msk; in BMC_EnableInt() 132 BMC->INTEN |= BMC_INTEN_TXUNDIEN_Msk; in BMC_EnableInt() 152 BMC->INTEN &= ~BMC_INTEN_FTXDIEN_Msk; in BMC_DisableInt() 158 BMC->INTEN &= ~BMC_INTEN_TXUNDIEN_Msk; in BMC_DisableInt()
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| D | bpwm.c | 481 (bpwm)->INTEN |= (u32IntDutyType << u32ChannelNum); in BPWM_EnableDutyInt() 495 …(bpwm)->INTEN &= (uint32_t)(~((BPWM_DUTY_INT_DOWN_COUNT_MATCH_CMP | BPWM_DUTY_INT_UP_COUNT_MATCH_C… in BPWM_DisableDutyInt() 543 (bpwm)->INTEN |= BPWM_INTEN_PIEN0_Msk; in BPWM_EnablePeriodInt() 559 (bpwm)->INTEN &= ~BPWM_INTEN_PIEN0_Msk; in BPWM_DisablePeriodInt() 609 (bpwm)->INTEN |= BPWM_INTEN_ZIEN0_Msk; in BPWM_EnableZeroInt() 625 (bpwm)->INTEN &= ~BPWM_INTEN_ZIEN0_Msk; in BPWM_DisableZeroInt()
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| /hal_nuvoton-latest/m2l31x/StdDriver/src/ |
| D | usci_spi.c | 281 uspi->INTEN |= USPI_INTEN_TXSTIEN_Msk; in USPI_EnableInt() 288 uspi->INTEN |= USPI_INTEN_TXENDIEN_Msk; in USPI_EnableInt() 295 uspi->INTEN |= USPI_INTEN_RXSTIEN_Msk; in USPI_EnableInt() 302 uspi->INTEN |= USPI_INTEN_RXENDIEN_Msk; in USPI_EnableInt() 372 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk; in USPI_DisableInt() 379 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk; in USPI_DisableInt() 386 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk; in USPI_DisableInt() 393 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk; in USPI_DisableInt()
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| D | gpio.c | 81 port->INTEN = (port->INTEN&~(0x00010001ul<<u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt() 103 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
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| D | usci_uart.c | 229 uuart->INTEN &= ~UUART_INTEN_TXSTIEN_Msk; in UUART_DisableInt() 235 uuart->INTEN &= ~UUART_INTEN_TXENDIEN_Msk; in UUART_DisableInt() 241 uuart->INTEN &= ~UUART_INTEN_RXSTIEN_Msk; in UUART_DisableInt() 247 uuart->INTEN &= ~UUART_INTEN_RXENDIEN_Msk; in UUART_DisableInt() 294 uuart->INTEN |= UUART_INTEN_TXSTIEN_Msk; in UUART_EnableInt() 300 uuart->INTEN |= UUART_INTEN_TXENDIEN_Msk; in UUART_EnableInt() 306 uuart->INTEN |= UUART_INTEN_RXSTIEN_Msk; in UUART_EnableInt() 312 uuart->INTEN |= UUART_INTEN_RXENDIEN_Msk; in UUART_EnableInt()
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| D | lpuart.c | 83 lpuart->INTEN = 0ul; in LPUART_Close() 98 lpuart->INTEN &= ~(LPUART_INTEN_ATORTSEN_Msk | LPUART_INTEN_ATOCTSEN_Msk); in LPUART_DisableFlowCtrl() 144 lpuart->INTEN |= LPUART_INTEN_ATORTSEN_Msk | LPUART_INTEN_ATOCTSEN_Msk; in LPUART_EnableFlowCtrl() 350 lpuart->INTEN |= LPUART_INTEN_TOCNTEN_Msk; in LPUART_SetTimeoutCnt()
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| /hal_nuvoton-latest/m48x/StdDriver/src/ |
| D | usci_spi.c | 276 uspi->INTEN |= USPI_INTEN_TXSTIEN_Msk; in USPI_EnableInt() 282 uspi->INTEN |= USPI_INTEN_TXENDIEN_Msk; in USPI_EnableInt() 288 uspi->INTEN |= USPI_INTEN_RXSTIEN_Msk; in USPI_EnableInt() 294 uspi->INTEN |= USPI_INTEN_RXENDIEN_Msk; in USPI_EnableInt() 358 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk; in USPI_DisableInt() 364 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk; in USPI_DisableInt() 370 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk; in USPI_DisableInt() 376 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk; in USPI_DisableInt()
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| D | gpio.c | 70 port->INTEN = (port->INTEN&~(0x00010001ul<<u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt() 90 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
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| D | usci_uart.c | 229 uuart->INTEN &= ~UUART_INTEN_TXSTIEN_Msk; in UUART_DisableInt() 235 uuart->INTEN &= ~UUART_INTEN_TXENDIEN_Msk; in UUART_DisableInt() 241 uuart->INTEN &= ~UUART_INTEN_RXSTIEN_Msk; in UUART_DisableInt() 247 uuart->INTEN &= ~UUART_INTEN_RXENDIEN_Msk; in UUART_DisableInt() 294 uuart->INTEN |= UUART_INTEN_TXSTIEN_Msk; in UUART_EnableInt() 300 uuart->INTEN |= UUART_INTEN_TXENDIEN_Msk; in UUART_EnableInt() 306 uuart->INTEN |= UUART_INTEN_RXSTIEN_Msk; in UUART_EnableInt() 312 uuart->INTEN |= UUART_INTEN_RXENDIEN_Msk; in UUART_EnableInt()
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| D | bpwm.c | 478 (bpwm)->INTEN |= (u32IntDutyType << u32ChannelNum); in BPWM_EnableDutyInt() 493 …(bpwm)->INTEN &= ~((uint32_t)(BPWM_DUTY_INT_DOWN_COUNT_MATCH_CMP | BPWM_DUTY_INT_UP_COUNT_MATCH_CM… in BPWM_DisableDutyInt() 539 (bpwm)->INTEN |= BPWM_INTEN_PIEN0_Msk; in BPWM_EnablePeriodInt() 554 (bpwm)->INTEN &= ~BPWM_INTEN_PIEN0_Msk; in BPWM_DisablePeriodInt() 601 (bpwm)->INTEN |= BPWM_INTEN_ZIEN0_Msk; in BPWM_EnableZeroInt() 616 (bpwm)->INTEN &= ~BPWM_INTEN_ZIEN0_Msk; in BPWM_DisableZeroInt()
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