1 /**************************************************************************//**
2 * @file usci_spi.c
3 * @version V3.00
4 * @brief M460 series USCI_SPI driver source file
5 *
6 * @copyright SPDX-License-Identifier: Apache-2.0
7 * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #include "NuMicro.h"
10
11 /** @addtogroup Standard_Driver Standard Driver
12 @{
13 */
14
15 /** @addtogroup USCI_SPI_Driver USCI_SPI Driver
16 @{
17 */
18
19
20 /** @addtogroup USCI_SPI_EXPORTED_FUNCTIONS USCI_SPI Exported Functions
21 @{
22 */
23
24 /**
25 * @brief This function make USCI_SPI module be ready to transfer.
26 * By default, the USCI_SPI transfer sequence is MSB first, the slave selection
27 * signal is active low and the automatic slave select function is disabled. In
28 * Slave mode, the u32BusClock must be NULL and the USCI_SPI clock
29 * divider setting will be 0.
30 * @param[in] uspi The pointer of the specified USCI_SPI module.
31 * @param[in] u32MasterSlave Decide the USCI_SPI module is operating in master mode or in slave mode. Valid values are:
32 * - \ref USPI_SLAVE
33 * - \ref USPI_MASTER
34 * @param[in] u32SPIMode Decide the transfer timing. Valid values are:
35 * - \ref USPI_MODE_0
36 * - \ref USPI_MODE_1
37 * - \ref USPI_MODE_2
38 * - \ref USPI_MODE_3
39 * @param[in] u32DataWidth The data width of a USCI_SPI transaction.
40 * @param[in] u32BusClock The expected frequency of USCI_SPI bus clock in Hz.
41 * @return Actual frequency of USCI_SPI peripheral clock.
42 */
USPI_Open(USPI_T * uspi,uint32_t u32MasterSlave,uint32_t u32SPIMode,uint32_t u32DataWidth,uint32_t u32BusClock)43 uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
44 {
45 uint32_t u32ClkDiv = 0ul;
46 uint32_t u32Pclk;
47 uint32_t u32UspiClk = 0ul;
48
49 if(uspi == (USPI_T *)USPI0)
50 {
51 u32Pclk = CLK_GetPCLK0Freq();
52 }
53
54 if(u32BusClock != 0ul)
55 {
56 u32ClkDiv = (uint32_t)((((((u32Pclk / 2ul) * 10ul) / (u32BusClock)) + 5ul) / 10ul) - 1ul); /* Compute proper divider for USCI_SPI clock */
57 }
58 else {}
59
60 /* Enable USCI_SPI protocol */
61 uspi->CTL &= ~USPI_CTL_FUNMODE_Msk;
62 uspi->CTL = 1ul << USPI_CTL_FUNMODE_Pos;
63
64 /* Data format configuration */
65 if(u32DataWidth == 16ul)
66 {
67 u32DataWidth = 0ul;
68 }
69 else {}
70 uspi->LINECTL &= ~USPI_LINECTL_DWIDTH_Msk;
71 uspi->LINECTL |= (u32DataWidth << USPI_LINECTL_DWIDTH_Pos);
72
73 /* MSB data format */
74 uspi->LINECTL &= ~USPI_LINECTL_LSB_Msk;
75
76 /* Set slave selection signal active low */
77 if(u32MasterSlave == USPI_MASTER)
78 {
79 uspi->LINECTL |= USPI_LINECTL_CTLOINV_Msk;
80 }
81 else
82 {
83 uspi->CTLIN0 |= USPI_CTLIN0_ININV_Msk;
84 }
85
86 /* Set operating mode and transfer timing */
87 uspi->PROTCTL &= ~(USPI_PROTCTL_SCLKMODE_Msk | USPI_PROTCTL_AUTOSS_Msk | USPI_PROTCTL_SLAVE_Msk);
88 uspi->PROTCTL |= (u32MasterSlave | u32SPIMode);
89
90 /* Set USCI_SPI bus clock */
91 uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
92 uspi->BRGEN |= (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
93 uspi->PROTCTL |= USPI_PROTCTL_PROTEN_Msk;
94
95 if(u32BusClock != 0ul)
96 {
97 u32UspiClk = (uint32_t)(u32Pclk / ((u32ClkDiv + 1ul) << 1));
98 }
99 else {}
100
101 return u32UspiClk;
102 }
103
104 /**
105 * @brief Disable USCI_SPI function mode.
106 * @param[in] uspi The pointer of the specified USCI_SPI module.
107 * @return None
108 */
USPI_Close(USPI_T * uspi)109 void USPI_Close(USPI_T *uspi)
110 {
111 uspi->CTL &= ~USPI_CTL_FUNMODE_Msk;
112 }
113
114 /**
115 * @brief Clear Rx buffer.
116 * @param[in] uspi The pointer of the specified USCI_SPI module.
117 * @return None
118 */
USPI_ClearRxBuf(USPI_T * uspi)119 void USPI_ClearRxBuf(USPI_T *uspi)
120 {
121 uspi->BUFCTL |= USPI_BUFCTL_RXCLR_Msk;
122 }
123
124 /**
125 * @brief Clear Tx buffer.
126 * @param[in] uspi The pointer of the specified USCI_SPI module.
127 * @return None
128 */
USPI_ClearTxBuf(USPI_T * uspi)129 void USPI_ClearTxBuf(USPI_T *uspi)
130 {
131 uspi->BUFCTL |= USPI_BUFCTL_TXCLR_Msk;
132 }
133
134 /**
135 * @brief Disable the automatic slave select function.
136 * @param[in] uspi The pointer of the specified USCI_SPI module.
137 * @return None
138 */
USPI_DisableAutoSS(USPI_T * uspi)139 void USPI_DisableAutoSS(USPI_T *uspi)
140 {
141 uspi->PROTCTL &= ~(USPI_PROTCTL_AUTOSS_Msk | USPI_PROTCTL_SS_Msk);
142 }
143
144 /**
145 * @brief Enable the automatic slave select function. Only available in Master mode.
146 * @param[in] uspi The pointer of the specified USCI_SPI module.
147 * @param[in] u32SSPinMask This parameter is not used.
148 * @param[in] u32ActiveLevel The active level of slave select signal. Valid values are:
149 * - \ref USPI_SS_ACTIVE_HIGH
150 * - \ref USPI_SS_ACTIVE_LOW
151 * @return None
152 */
USPI_EnableAutoSS(USPI_T * uspi,uint32_t u32SSPinMask,uint32_t u32ActiveLevel)153 void USPI_EnableAutoSS(USPI_T *uspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
154 {
155 uspi->LINECTL = (uspi->LINECTL & ~USPI_LINECTL_CTLOINV_Msk) | u32ActiveLevel;
156 uspi->PROTCTL |= USPI_PROTCTL_AUTOSS_Msk;
157 }
158
159 /**
160 * @brief Set the USCI_SPI bus clock. Only available in Master mode.
161 * @param[in] uspi The pointer of the specified USCI_SPI module.
162 * @param[in] u32BusClock The expected frequency of USCI_SPI bus clock.
163 * @return Actual frequency of USCI_SPI peripheral clock.
164 */
USPI_SetBusClock(USPI_T * uspi,uint32_t u32BusClock)165 uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
166 {
167 uint32_t u32ClkDiv;
168 uint32_t u32Pclk = 0UL;
169
170 if(uspi == USPI0)
171 {
172 u32Pclk = CLK_GetPCLK0Freq();
173 }
174
175 u32ClkDiv = (uint32_t)((((((u32Pclk / 2ul) * 10ul) / (u32BusClock)) + 5ul) / 10ul) - 1ul); /* Compute proper divider for USCI_SPI clock */
176
177 /* Set USCI_SPI bus clock */
178 uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
179 uspi->BRGEN |= (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
180
181 return (u32Pclk / ((u32ClkDiv + 1ul) << 1));
182 }
183
184 /**
185 * @brief Get the actual frequency of USCI_SPI bus clock. Only available in Master mode.
186 * @param[in] uspi The pointer of the specified USCI_SPI module.
187 * @return Actual USCI_SPI bus clock frequency.
188 */
USPI_GetBusClock(USPI_T * uspi)189 uint32_t USPI_GetBusClock(USPI_T *uspi)
190 {
191 uint32_t u32BusClk = 0UL;
192 uint32_t u32ClkDiv;
193
194 u32ClkDiv = (uspi->BRGEN & USPI_BRGEN_CLKDIV_Msk) >> USPI_BRGEN_CLKDIV_Pos;
195
196 if(uspi == USPI0)
197 {
198 u32BusClk = (uint32_t)(CLK_GetPCLK0Freq() / ((u32ClkDiv + 1ul) << 1));
199 }
200
201 return u32BusClk;
202 }
203
204 /**
205 * @brief Enable related interrupts specified by u32Mask parameter.
206 * @param[in] uspi The pointer of the specified USCI_SPI module.
207 * @param[in] u32Mask The combination of all related interrupt enable bits.
208 * Each bit corresponds to a interrupt bit.
209 * This parameter decides which interrupts will be enabled. Valid values are:
210 * - \ref USPI_SSINACT_INT_MASK
211 * - \ref USPI_SSACT_INT_MASK
212 * - \ref USPI_SLVTO_INT_MASK
213 * - \ref USPI_SLVBE_INT_MASK
214 * - \ref USPI_TXUDR_INT_MASK
215 * - \ref USPI_RXOV_INT_MASK
216 * - \ref USPI_TXST_INT_MASK
217 * - \ref USPI_TXEND_INT_MASK
218 * - \ref USPI_RXST_INT_MASK
219 * - \ref USPI_RXEND_INT_MASK
220 * @return None
221 */
USPI_EnableInt(USPI_T * uspi,uint32_t u32Mask)222 void USPI_EnableInt(USPI_T *uspi, uint32_t u32Mask)
223 {
224 /* Enable slave selection signal inactive interrupt flag */
225 if((u32Mask & USPI_SSINACT_INT_MASK) == USPI_SSINACT_INT_MASK)
226 {
227 uspi->PROTIEN |= USPI_PROTIEN_SSINAIEN_Msk;
228 }
229 else {}
230
231 /* Enable slave selection signal active interrupt flag */
232 if((u32Mask & USPI_SSACT_INT_MASK) == USPI_SSACT_INT_MASK)
233 {
234 uspi->PROTIEN |= USPI_PROTIEN_SSACTIEN_Msk;
235 }
236 else {}
237
238 /* Enable slave time-out interrupt flag */
239 if((u32Mask & USPI_SLVTO_INT_MASK) == USPI_SLVTO_INT_MASK)
240 {
241 uspi->PROTIEN |= USPI_PROTIEN_SLVTOIEN_Msk;
242 }
243 else {}
244
245 /* Enable slave bit count error interrupt flag */
246 if((u32Mask & USPI_SLVBE_INT_MASK) == USPI_SLVBE_INT_MASK)
247 {
248 uspi->PROTIEN |= USPI_PROTIEN_SLVBEIEN_Msk;
249 }
250 else {}
251
252 /* Enable TX under run interrupt flag */
253 if((u32Mask & USPI_TXUDR_INT_MASK) == USPI_TXUDR_INT_MASK)
254 {
255 uspi->BUFCTL |= USPI_BUFCTL_TXUDRIEN_Msk;
256 }
257 else {}
258
259 /* Enable RX overrun interrupt flag */
260 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
261 {
262 uspi->BUFCTL |= USPI_BUFCTL_RXOVIEN_Msk;
263 }
264 else {}
265
266 /* Enable TX start interrupt flag */
267 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
268 {
269 uspi->INTEN |= USPI_INTEN_TXSTIEN_Msk;
270 }
271 else {}
272
273 /* Enable TX end interrupt flag */
274 if((u32Mask & USPI_TXEND_INT_MASK) == USPI_TXEND_INT_MASK)
275 {
276 uspi->INTEN |= USPI_INTEN_TXENDIEN_Msk;
277 }
278 else {}
279
280 /* Enable RX start interrupt flag */
281 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
282 {
283 uspi->INTEN |= USPI_INTEN_RXSTIEN_Msk;
284 }
285 else {}
286
287 /* Enable RX end interrupt flag */
288 if((u32Mask & USPI_RXEND_INT_MASK) == USPI_RXEND_INT_MASK)
289 {
290 uspi->INTEN |= USPI_INTEN_RXENDIEN_Msk;
291 }
292 else {}
293 }
294
295 /**
296 * @brief Disable related interrupts specified by u32Mask parameter.
297 * @param[in] uspi The pointer of the specified USCI_SPI module.
298 * @param[in] u32Mask The combination of all related interrupt enable bits.
299 * Each bit corresponds to a interrupt bit.
300 * This parameter decides which interrupts will be disabled. Valid values are:
301 * - \ref USPI_SSINACT_INT_MASK
302 * - \ref USPI_SSACT_INT_MASK
303 * - \ref USPI_SLVTO_INT_MASK
304 * - \ref USPI_SLVBE_INT_MASK
305 * - \ref USPI_TXUDR_INT_MASK
306 * - \ref USPI_RXOV_INT_MASK
307 * - \ref USPI_TXST_INT_MASK
308 * - \ref USPI_TXEND_INT_MASK
309 * - \ref USPI_RXST_INT_MASK
310 * - \ref USPI_RXEND_INT_MASK
311 * @return None
312 */
USPI_DisableInt(USPI_T * uspi,uint32_t u32Mask)313 void USPI_DisableInt(USPI_T *uspi, uint32_t u32Mask)
314 {
315 /* Disable slave selection signal inactive interrupt flag */
316 if((u32Mask & USPI_SSINACT_INT_MASK) == USPI_SSINACT_INT_MASK)
317 {
318 uspi->PROTIEN &= ~USPI_PROTIEN_SSINAIEN_Msk;
319 }
320 else {}
321
322 /* Disable slave selection signal active interrupt flag */
323 if((u32Mask & USPI_SSACT_INT_MASK) == USPI_SSACT_INT_MASK)
324 {
325 uspi->PROTIEN &= ~USPI_PROTIEN_SSACTIEN_Msk;
326 }
327 else {}
328
329 /* Disable slave time-out interrupt flag */
330 if((u32Mask & USPI_SLVTO_INT_MASK) == USPI_SLVTO_INT_MASK)
331 {
332 uspi->PROTIEN &= ~USPI_PROTIEN_SLVTOIEN_Msk;
333 }
334 else {}
335
336 /* Disable slave bit count error interrupt flag */
337 if((u32Mask & USPI_SLVBE_INT_MASK) == USPI_SLVBE_INT_MASK)
338 {
339 uspi->PROTIEN &= ~USPI_PROTIEN_SLVBEIEN_Msk;
340 }
341 else {}
342
343 /* Disable TX under run interrupt flag */
344 if((u32Mask & USPI_TXUDR_INT_MASK) == USPI_TXUDR_INT_MASK)
345 {
346 uspi->BUFCTL &= ~USPI_BUFCTL_TXUDRIEN_Msk;
347 }
348 else {}
349
350 /* Disable RX overrun interrupt flag */
351 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
352 {
353 uspi->BUFCTL &= ~USPI_BUFCTL_RXOVIEN_Msk;
354 }
355 else {}
356
357 /* Disable TX start interrupt flag */
358 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
359 {
360 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk;
361 }
362 else {}
363
364 /* Disable TX end interrupt flag */
365 if((u32Mask & USPI_TXEND_INT_MASK) == USPI_TXEND_INT_MASK)
366 {
367 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk;
368 }
369 else {}
370
371 /* Disable RX start interrupt flag */
372 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
373 {
374 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk;
375 }
376 else {}
377
378 /* Disable RX end interrupt flag */
379 if((u32Mask & USPI_RXEND_INT_MASK) == USPI_RXEND_INT_MASK)
380 {
381 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk;
382 }
383 else {}
384 }
385
386 /**
387 * @brief Get interrupt flag.
388 * @param[in] uspi The pointer of the specified USCI_SPI module.
389 * @param[in] u32Mask The combination of all related interrupt sources.
390 * Each bit corresponds to a interrupt source.
391 * This parameter decides which interrupt flags will be read. It is combination of:
392 * - \ref USPI_SSINACT_INT_MASK
393 * - \ref USPI_SSACT_INT_MASK
394 * - \ref USPI_SLVTO_INT_MASK
395 * - \ref USPI_SLVBE_INT_MASK
396 * - \ref USPI_TXUDR_INT_MASK
397 * - \ref USPI_RXOV_INT_MASK
398 * - \ref USPI_TXST_INT_MASK
399 * - \ref USPI_TXEND_INT_MASK
400 * - \ref USPI_RXST_INT_MASK
401 * - \ref USPI_RXEND_INT_MASK
402 * @return Interrupt flags of selected sources.
403 */
USPI_GetIntFlag(USPI_T * uspi,uint32_t u32Mask)404 uint32_t USPI_GetIntFlag(USPI_T *uspi, uint32_t u32Mask)
405 {
406 uint32_t u32TmpFlag;
407 uint32_t u32IntFlag = 0ul;
408
409 /* Check slave selection signal inactive interrupt flag */
410 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SSINAIF_Msk;
411 if(((u32Mask & USPI_SSINACT_INT_MASK) == USPI_SSINACT_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SSINAIF_Msk))
412 {
413 u32IntFlag |= USPI_SSINACT_INT_MASK;
414 }
415 else {}
416
417 /* Check slave selection signal active interrupt flag */
418 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SSACTIF_Msk;
419 if(((u32Mask & USPI_SSACT_INT_MASK) == USPI_SSACT_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SSACTIF_Msk))
420 {
421 u32IntFlag |= USPI_SSACT_INT_MASK;
422 }
423 else {}
424
425 /* Check slave time-out interrupt flag */
426 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SLVTOIF_Msk;
427 if(((u32Mask & USPI_SLVTO_INT_MASK) == USPI_SLVTO_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SLVTOIF_Msk))
428 {
429 u32IntFlag |= USPI_SLVTO_INT_MASK;
430 }
431 else {}
432
433 /* Check slave bit count error interrupt flag */
434 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SLVBEIF_Msk;
435 if(((u32Mask & USPI_SLVBE_INT_MASK) == USPI_SLVBE_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SLVBEIF_Msk))
436 {
437 u32IntFlag |= USPI_SLVBE_INT_MASK;
438 }
439 else {}
440
441 /* Check TX under run interrupt flag */
442 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_TXUDRIF_Msk;
443 if(((u32Mask & USPI_TXUDR_INT_MASK) == USPI_TXUDR_INT_MASK) && (u32TmpFlag == USPI_BUFSTS_TXUDRIF_Msk))
444 {
445 u32IntFlag |= USPI_TXUDR_INT_MASK;
446 }
447 else {}
448
449 /* Check RX overrun interrupt flag */
450 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_RXOVIF_Msk;
451 if(((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK) && (u32TmpFlag == USPI_BUFSTS_RXOVIF_Msk))
452 {
453 u32IntFlag |= USPI_RXOV_INT_MASK;
454 }
455 else {}
456
457 /* Check TX start interrupt flag */
458 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_TXSTIF_Msk;
459 if(((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_TXSTIF_Msk))
460 {
461 u32IntFlag |= USPI_TXST_INT_MASK;
462 }
463 else {}
464
465 /* Check TX end interrupt flag */
466 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_TXENDIF_Msk;
467 if(((u32Mask & USPI_TXEND_INT_MASK) == USPI_TXEND_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_TXENDIF_Msk))
468 {
469 u32IntFlag |= USPI_TXEND_INT_MASK;
470 }
471 else {}
472
473 /* Check RX start interrupt flag */
474 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_RXSTIF_Msk;
475 if(((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_RXSTIF_Msk))
476 {
477 u32IntFlag |= USPI_RXST_INT_MASK;
478 }
479 else {}
480
481 /* Check RX end interrupt flag */
482 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_RXENDIF_Msk;
483 if(((u32Mask & USPI_RXEND_INT_MASK) == USPI_RXEND_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_RXENDIF_Msk))
484 {
485 u32IntFlag |= USPI_RXEND_INT_MASK;
486 }
487 else {}
488
489 return u32IntFlag;
490 }
491
492 /**
493 * @brief Clear interrupt flag.
494 * @param[in] uspi The pointer of the specified USCI_SPI module.
495 * @param[in] u32Mask The combination of all related interrupt sources.
496 * Each bit corresponds to a interrupt source.
497 * This parameter decides which interrupt flags will be cleared. It could be the combination of:
498 * - \ref USPI_SSINACT_INT_MASK
499 * - \ref USPI_SSACT_INT_MASK
500 * - \ref USPI_SLVTO_INT_MASK
501 * - \ref USPI_SLVBE_INT_MASK
502 * - \ref USPI_TXUDR_INT_MASK
503 * - \ref USPI_RXOV_INT_MASK
504 * - \ref USPI_TXST_INT_MASK
505 * - \ref USPI_TXEND_INT_MASK
506 * - \ref USPI_RXST_INT_MASK
507 * - \ref USPI_RXEND_INT_MASK
508 * @return None
509 */
USPI_ClearIntFlag(USPI_T * uspi,uint32_t u32Mask)510 void USPI_ClearIntFlag(USPI_T *uspi, uint32_t u32Mask)
511 {
512 /* Clear slave selection signal inactive interrupt flag */
513 if((u32Mask & USPI_SSINACT_INT_MASK) == USPI_SSINACT_INT_MASK)
514 {
515 uspi->PROTSTS = USPI_PROTSTS_SSINAIF_Msk;
516 }
517 else {}
518
519 /* Clear slave selection signal active interrupt flag */
520 if((u32Mask & USPI_SSACT_INT_MASK) == USPI_SSACT_INT_MASK)
521 {
522 uspi->PROTSTS = USPI_PROTSTS_SSACTIF_Msk;
523 }
524 else {}
525
526 /* Clear slave time-out interrupt flag */
527 if((u32Mask & USPI_SLVTO_INT_MASK) == USPI_SLVTO_INT_MASK)
528 {
529 uspi->PROTSTS = USPI_PROTSTS_SLVTOIF_Msk;
530 }
531 else {}
532
533 /* Clear slave bit count error interrupt flag */
534 if((u32Mask & USPI_SLVBE_INT_MASK) == USPI_SLVBE_INT_MASK)
535 {
536 uspi->PROTSTS = USPI_PROTSTS_SLVBEIF_Msk;
537 }
538 else {}
539
540 /* Clear TX under run interrupt flag */
541 if((u32Mask & USPI_TXUDR_INT_MASK) == USPI_TXUDR_INT_MASK)
542 {
543 uspi->BUFSTS = USPI_BUFSTS_TXUDRIF_Msk;
544 }
545 else {}
546
547 /* Clear RX overrun interrupt flag */
548 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
549 {
550 uspi->BUFSTS = USPI_BUFSTS_RXOVIF_Msk;
551 }
552 else {}
553
554 /* Clear TX start interrupt flag */
555 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
556 {
557 uspi->PROTSTS = USPI_PROTSTS_TXSTIF_Msk;
558 }
559 else {}
560
561 /* Clear TX end interrupt flag */
562 if((u32Mask & USPI_TXEND_INT_MASK) == USPI_TXEND_INT_MASK)
563 {
564 uspi->PROTSTS = USPI_PROTSTS_TXENDIF_Msk;
565 }
566 else {}
567
568 /* Clear RX start interrupt flag */
569 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
570 {
571 uspi->PROTSTS = USPI_PROTSTS_RXSTIF_Msk;
572 }
573 else {}
574
575 /* Clear RX end interrupt flag */
576 if((u32Mask & USPI_RXEND_INT_MASK) == USPI_RXEND_INT_MASK)
577 {
578 uspi->PROTSTS = USPI_PROTSTS_RXENDIF_Msk;
579 }
580 else {}
581 }
582
583 /**
584 * @brief Get USCI_SPI status.
585 * @param[in] uspi The pointer of the specified USCI_SPI module.
586 * @param[in] u32Mask The combination of all related sources.
587 * Each bit corresponds to a source.
588 * This parameter decides which flags will be read. It is combination of:
589 * - \ref USPI_BUSY_MASK
590 * - \ref USPI_RX_EMPTY_MASK
591 * - \ref USPI_RX_FULL_MASK
592 * - \ref USPI_TX_EMPTY_MASK
593 * - \ref USPI_TX_FULL_MASK
594 * - \ref USPI_SSLINE_STS_MASK
595 * @return Flags of selected sources.
596 */
USPI_GetStatus(USPI_T * uspi,uint32_t u32Mask)597 uint32_t USPI_GetStatus(USPI_T *uspi, uint32_t u32Mask)
598 {
599 uint32_t u32Flag = 0ul;
600 uint32_t u32TmpFlag;
601
602 /* Check busy status */
603 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_BUSY_Msk;
604 if(((u32Mask & USPI_BUSY_MASK) == USPI_BUSY_MASK) && (u32TmpFlag & USPI_PROTSTS_BUSY_Msk))
605 {
606 u32Flag |= USPI_BUSY_MASK;
607 }
608 else {}
609
610 /* Check RX empty flag */
611 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_RXEMPTY_Msk;
612 if(((u32Mask & USPI_RX_EMPTY_MASK) == USPI_RX_EMPTY_MASK) && (u32TmpFlag == USPI_BUFSTS_RXEMPTY_Msk))
613 {
614 u32Flag |= USPI_RX_EMPTY_MASK;
615 }
616 else {}
617
618 /* Check RX full flag */
619 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_RXFULL_Msk;
620 if(((u32Mask & USPI_RX_FULL_MASK) == USPI_RX_FULL_MASK) && (u32TmpFlag == USPI_BUFSTS_RXFULL_Msk))
621 {
622 u32Flag |= USPI_RX_FULL_MASK;
623 }
624 else {}
625
626 /* Check TX empty flag */
627 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_TXEMPTY_Msk;
628 if(((u32Mask & USPI_TX_EMPTY_MASK) == USPI_TX_EMPTY_MASK) && (u32TmpFlag == USPI_BUFSTS_TXEMPTY_Msk))
629 {
630 u32Flag |= USPI_TX_EMPTY_MASK;
631 }
632 else {}
633
634 /* Check TX full flag */
635 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_TXFULL_Msk;
636 if(((u32Mask & USPI_TX_FULL_MASK) == USPI_TX_FULL_MASK) && (u32TmpFlag == USPI_BUFSTS_TXFULL_Msk))
637 {
638 u32Flag |= USPI_TX_FULL_MASK;
639 }
640 else {}
641
642 /* Check USCI_SPI_SS line status */
643 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SSLINE_Msk;
644 if(((u32Mask & USPI_SSLINE_STS_MASK) == USPI_SSLINE_STS_MASK) && (u32TmpFlag & USPI_PROTSTS_SSLINE_Msk))
645 {
646 u32Flag |= USPI_SSLINE_STS_MASK;
647 }
648 else {}
649
650 return u32Flag;
651 }
652
653 /**
654 * @brief Enable USCI_SPI Wake-up Function.
655 * @param[in] uspi The pointer of the specified USCI_SPI module.
656 * @return None
657 */
USPI_EnableWakeup(USPI_T * uspi)658 void USPI_EnableWakeup(USPI_T *uspi)
659 {
660 uspi->WKCTL |= USPI_WKCTL_WKEN_Msk;
661 }
662
663 /**
664 * @brief Disable USCI_SPI Wake-up Function.
665 * @param[in] uspi The pointer of the specified USCI_SPI module.
666 * @return None
667 */
USPI_DisableWakeup(USPI_T * uspi)668 void USPI_DisableWakeup(USPI_T *uspi)
669 {
670 uspi->WKCTL &= ~USPI_WKCTL_WKEN_Msk;
671 }
672
673 /*@}*/ /* end of group USCI_SPI_EXPORTED_FUNCTIONS */
674
675 /*@}*/ /* end of group USCI_SPI_Driver */
676
677 /*@}*/ /* end of group Standard_Driver */
678
