1 /**************************************************************************//**
2 * @file uart.h
3 * @version V3.00
4 * @brief M2L31 series UART driver header file
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 * @copyright (C) 2022 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #ifndef __UART_H__
10 #define __UART_H__
11
12
13 #ifdef __cplusplus
14 extern "C"
15 {
16 #endif
17
18
19 /** @addtogroup Standard_Driver Standard Driver
20 @{
21 */
22
23 /** @addtogroup UART_Driver UART Driver
24 @{
25 */
26
27 /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
28 @{
29 */
30
31 /*---------------------------------------------------------------------------------------------------------*/
32 /* UART FIFO size constants definitions */
33 /*---------------------------------------------------------------------------------------------------------*/
34
35 #define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
36 #define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
37 #define UART2_FIFO_SIZE 16ul /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
38 #define UART3_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
39 #define UART4_FIFO_SIZE 16ul /*!< UART4 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
40 #define UART5_FIFO_SIZE 16ul /*!< UART5 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
41 #define UART6_FIFO_SIZE 16ul /*!< UART6 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
42 #define UART7_FIFO_SIZE 16ul /*!< UART7 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
43
44 /*---------------------------------------------------------------------------------------------------------*/
45 /* UART_FIFO constants definitions */
46 /*---------------------------------------------------------------------------------------------------------*/
47
48 #define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */
49 #define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */
50 #define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */
51 #define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */
52
53 #define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */
54 #define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */
55 #define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */
56 #define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */
57
58 /*---------------------------------------------------------------------------------------------------------*/
59 /* UART_LINE constants definitions */
60 /*---------------------------------------------------------------------------------------------------------*/
61 #define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */
62 #define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */
63 #define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */
64 #define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */
65
66 #define UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */
67 #define UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */
68 #define UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */
69 #define UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */
70 #define UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */
71
72 #define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */
73 #define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */
74 #define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */
75
76
77 /*---------------------------------------------------------------------------------------------------------*/
78 /* UART RTS ACTIVE LEVEL constants definitions */
79 /*---------------------------------------------------------------------------------------------------------*/
80 #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */
81 #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */
82
83
84 /*---------------------------------------------------------------------------------------------------------*/
85 /* UART_IRDA constants definitions */
86 /*---------------------------------------------------------------------------------------------------------*/
87 #define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */
88 #define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */
89
90
91 /*---------------------------------------------------------------------------------------------------------*/
92 /* UART_FUNCSEL constants definitions */
93 /*---------------------------------------------------------------------------------------------------------*/
94 #define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */
95 #define UART_FUNCSEL_LIN (0x1ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function \hideinitializer */
96 #define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */
97 #define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */
98 #define UART_FUNCSEL_SINGLE_WIRE (0x4ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set Single Wire Function \hideinitializer */
99
100
101 /*---------------------------------------------------------------------------------------------------------*/
102 /* UART_LINCTL constants definitions */
103 /*---------------------------------------------------------------------------------------------------------*/
104 #define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 \hideinitializer */
105 #define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 \hideinitializer */
106 #define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field \hideinitializer */
107 #define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field \hideinitializer */
108 #define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field \hideinitializer */
109 #define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value \hideinitializer */
110
111
112 /*---------------------------------------------------------------------------------------------------------*/
113 /* UART BAUDRATE MODE constants definitions */
114 /*---------------------------------------------------------------------------------------------------------*/
115 #define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */
116 #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */
117
118
119 /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
120
121
122 /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
123 @{
124 */
125
126
127 /**
128 * @brief Calculate UART baudrate mode0 divider
129 *
130 * @param[in] u32SrcFreq UART clock frequency
131 * @param[in] u32BaudRate Baudrate of UART module
132 *
133 * @return UART baudrate mode0 divider
134 *
135 * @details This macro calculate UART baudrate mode0 divider.
136 * \hideinitializer
137 */
138 #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul)
139
140
141 /**
142 * @brief Calculate UART baudrate mode2 divider
143 *
144 * @param[in] u32SrcFreq UART clock frequency
145 * @param[in] u32BaudRate Baudrate of UART module
146 *
147 * @return UART baudrate mode2 divider
148 *
149 * @details This macro calculate UART baudrate mode2 divider.
150 * \hideinitializer
151 */
152 #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul)
153
154
155 /**
156 * @brief Write UART data
157 *
158 * @param[in] uart The pointer of the specified UART module
159 * @param[in] u8Data Data byte to transmit.
160 *
161 * @return None
162 *
163 * @details This macro write Data to Tx data register.
164 * \hideinitializer
165 */
166 #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
167
168
169 /**
170 * @brief Read UART data
171 *
172 * @param[in] uart The pointer of the specified UART module
173 *
174 * @return The oldest data byte in RX FIFO.
175 *
176 * @details This macro read Rx data register.
177 * \hideinitializer
178 */
179 #define UART_READ(uart) ((uart)->DAT)
180
181
182 /**
183 * @brief Get Tx empty
184 *
185 * @param[in] uart The pointer of the specified UART module
186 *
187 * @retval 0 Tx FIFO is not empty
188 * @retval >=1 Tx FIFO is empty
189 *
190 * @details This macro get Transmitter FIFO empty register value.
191 * \hideinitializer
192 */
193 #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
194
195
196 /**
197 * @brief Get Rx empty
198 *
199 * @param[in] uart The pointer of the specified UART module
200 *
201 * @retval 0 Rx FIFO is not empty
202 * @retval >=1 Rx FIFO is empty
203 *
204 * @details This macro get Receiver FIFO empty register value.
205 * \hideinitializer
206 */
207 #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
208
209
210 /**
211 * @brief Check specified UART port transmission is over.
212 *
213 * @param[in] uart The pointer of the specified UART module
214 *
215 * @retval 0 Tx transmission is not over
216 * @retval 1 Tx transmission is over
217 *
218 * @details This macro return Transmitter Empty Flag register bit value.
219 * It indicates if specified UART port transmission is over nor not.
220 * \hideinitializer
221 */
222 #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
223
224
225 /**
226 * @brief Wait specified UART port transmission is over
227 *
228 * @param[in] uart The pointer of the specified UART module
229 *
230 * @return None
231 *
232 * @details This macro wait specified UART port transmission is over.
233 * \hideinitializer
234 */
235 #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
236
237
238 /**
239 * @brief Check RX is ready or not
240 *
241 * @param[in] uart The pointer of the specified UART module
242 *
243 * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
244 * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
245 *
246 * @details This macro check receive data available interrupt flag is set or not.
247 * \hideinitializer
248 */
249 #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
250
251
252 /**
253 * @brief Check TX FIFO is full or not
254 *
255 * @param[in] uart The pointer of the specified UART module
256 *
257 * @retval 1 TX FIFO is full
258 * @retval 0 TX FIFO is not full
259 *
260 * @details This macro check TX FIFO is full or not.
261 * \hideinitializer
262 */
263 #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
264
265
266 /**
267 * @brief Check RX FIFO is full or not
268 *
269 * @param[in] uart The pointer of the specified UART module
270 *
271 * @retval 1 RX FIFO is full
272 * @retval 0 RX FIFO is not full
273 *
274 * @details This macro check RX FIFO is full or not.
275 * \hideinitializer
276 */
277 #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
278
279
280 /**
281 * @brief Get Tx full register value
282 *
283 * @param[in] uart The pointer of the specified UART module
284 *
285 * @retval 0 Tx FIFO is not full.
286 * @retval >=1 Tx FIFO is full.
287 *
288 * @details This macro get Tx full register value.
289 * \hideinitializer
290 */
291 #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
292
293
294 /**
295 * @brief Get Rx full register value
296 *
297 * @param[in] uart The pointer of the specified UART module
298 *
299 * @retval 0 Rx FIFO is not full.
300 * @retval >=1 Rx FIFO is full.
301 *
302 * @details This macro get Rx full register value.
303 * \hideinitializer
304 */
305 #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
306
307 /**
308 * @brief Rx Idle Status register value
309 *
310 * @param[in] uart The pointer of the specified UART module
311 *
312 * @retval 0 Rx is busy.
313 * @retval 1 Rx is Idle(Default)
314 *
315 * @details This macro get Rx Idle Status register value.
316 * \hideinitializer
317 */
318 #define UART_RX_IDLE(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXIDLE_Msk )>> UART_FIFOSTS_RXIDLE_Pos)
319
320 /**
321 * @brief Enable specified UART interrupt
322 *
323 * @param[in] uart The pointer of the specified UART module
324 * @param[in] u32eIntSel Interrupt type select
325 * - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty Interrupt
326 * - \ref UART_INTEN_ABRIEN_Msk : Auto-baud Rate Interrupt
327 * - \ref UART_INTEN_SWBEIEN_Msk : Single-wire Bit Error Detection Interrupt
328 * - \ref UART_INTEN_LINIEN_Msk : Lin Bus Interrupt
329 * - \ref UART_INTEN_WKIEN_Msk : Wake-up Interrupt
330 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error Interrupt
331 * - \ref UART_INTEN_RXTOIEN_Msk : Rx Time-out Interrupt
332 * - \ref UART_INTEN_MODEMIEN_Msk : MODEM Status Interrupt
333 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line Status Interrupt
334 * - \ref UART_INTEN_THREIEN_Msk : Transmit Holding Register Empty Interrupt
335 * - \ref UART_INTEN_RDAIEN_Msk : Receive Data Available Interrupt
336 *
337 * @return None
338 *
339 * @details This macro enable specified UART interrupt.
340 * \hideinitializer
341 */
342 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
343
344
345 /**
346 * @brief Disable specified UART interrupt
347 *
348 * @param[in] uart The pointer of the specified UART module
349 * @param[in] u32eIntSel Interrupt type select
350 * - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty Interrupt
351 * - \ref UART_INTEN_ABRIEN_Msk : Auto-baud Rate Interrupt
352 * - \ref UART_INTEN_SWBEIEN_Msk : Single-wire Bit Error Detection Interrupt
353 * - \ref UART_INTEN_LINIEN_Msk : Lin Bus Interrupt
354 * - \ref UART_INTEN_WKIEN_Msk : Wake-up Interrupt
355 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error Interrupt
356 * - \ref UART_INTEN_RXTOIEN_Msk : Rx Time-out Interrupt
357 * - \ref UART_INTEN_MODEMIEN_Msk : MODEM Status Interrupt
358 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line Status Interrupt
359 * - \ref UART_INTEN_THREIEN_Msk : Transmit Holding Register Empty Interrupt
360 * - \ref UART_INTEN_RDAIEN_Msk : Receive Data Available Interrupt
361 *
362 * @return None
363 *
364 * @details This macro disable specified UART interrupt.
365 * \hideinitializer
366 */
367 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
368
369
370 /**
371 * @brief Get specified interrupt flag/status
372 *
373 * @param[in] uart The pointer of the specified UART module
374 * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
375 * - \ref UART_INTSTS_ABRINT_Msk : Auto-baud Rate Interrupt Indicator
376 * - \ref UART_INTSTS_TXENDINT_Msk : Transmitter Empty Interrupt Indicator
377 * - \ref UART_INTSTS_HWBUFEINT_Msk : PDMA Mode Buffer Error Interrupt Indicator
378 * - \ref UART_INTSTS_HWTOINT_Msk : PDMA Mode Rx Time-out Interrupt Indicator
379 * - \ref UART_INTSTS_HWMODINT_Msk : PDMA Mode MODEM Status Interrupt Indicator
380 * - \ref UART_INTSTS_HWRLSINT_Msk : PDMA Mode Receive Line Status Interrupt Indicator
381 * - \ref UART_INTSTS_SWBEINT_Msk : Single-wire Bit Error Detect Interrupt Indicator
382 * - \ref UART_INTSTS_TXENDIF_Msk : Transmitter Empty Interrupt Flag
383 * - \ref UART_INTSTS_HWBUFEIF_Msk : PDMA Mode Buffer Error Interrupt Flag
384 * - \ref UART_INTSTS_HWTOIF_Msk : PDMA Mode Time-out Interrupt Flag
385 * - \ref UART_INTSTS_HWMODIF_Msk : PDMA Mode MODEM Status Interrupt Flag
386 * - \ref UART_INTSTS_HWRLSIF_Msk : PDMA Mode Receive Line Status Flag
387 * - \ref UART_INTSTS_SWBEIF_Msk : Single-wire Bit Error Detect Interrupt Flag
388 * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator
389 * - \ref UART_INTSTS_WKINT_Msk : Wake-up Interrupt Indicator
390 * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
391 * - \ref UART_INTSTS_RXTOINT_Msk : Rx Time-out Interrupt Indicator
392 * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
393 * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
394 * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
395 * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
396 * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Interrupt Flag
397 * - \ref UART_INTSTS_WKIF_Msk : Wake-up Interrupt Flag
398 * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
399 * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
400 * - \ref UART_INTSTS_MODEMIF_Msk : MODEM Status Interrupt Flag
401 * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
402 * - \ref UART_INTSTS_THREIF_Msk : Transmit Holding Register Empty Interrupt Flag
403 * - \ref UART_INTSTS_RDAIF_Msk : Receive Data Available Interrupt Flag
404 *
405 * @retval 0 The specified interrupt is not happened.
406 * 1 The specified interrupt is happened.
407 *
408 * @details This macro get specified interrupt flag or interrupt indicator status.
409 * \hideinitializer
410 */
411 #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
412
413
414 /**
415 * @brief Clear RS-485 Address Byte Detection Flag
416 *
417 * @param[in] uart The pointer of the specified UART module
418 *
419 * @return None
420 *
421 * @details This macro clear RS-485 address byte detection flag.
422 * \hideinitializer
423 */
424 #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
425
426
427 /**
428 * @brief Get RS-485 Address Byte Detection Flag
429 *
430 * @param[in] uart The pointer of the specified UART module
431 *
432 * @retval 0 Receiver detects a data that is not an address bit.
433 * @retval 1 Receiver detects a data that is an address bit.
434 *
435 * @details This macro get RS-485 address byte detection flag.
436 * \hideinitializer
437 */
438 #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
439
440 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
441 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart);
442 __STATIC_INLINE void UART_SET_RTS(UART_T* uart);
443
444
445 /**
446 * @brief Set RTS pin to low
447 *
448 * @param[in] uart The pointer of the specified UART module
449 *
450 * @return None
451 *
452 * @details This macro set RTS pin to low.
453 * \hideinitializer
454 */
UART_CLEAR_RTS(UART_T * uart)455 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
456 {
457 uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
458 uart->MODEM &= ~UART_MODEM_RTS_Msk;
459 }
460
461
462 /**
463 * @brief Set RTS pin to high
464 *
465 * @param[in] uart The pointer of the specified UART module
466 *
467 * @return None
468 *
469 * @details This macro set RTS pin to high.
470 * \hideinitializer
471 */
UART_SET_RTS(UART_T * uart)472 __STATIC_INLINE void UART_SET_RTS(UART_T* uart)
473 {
474 uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
475 }
476
477 /**
478 * @brief Enable specified UART PDMA function
479 *
480 * @param[in] uart The pointer of the specified UART module
481 * @param[in] u32FuncSel Combination of following functions
482 * - \ref UART_INTEN_TXPDMAEN_Msk
483 * - \ref UART_INTEN_RXPDMAEN_Msk
484 *
485 * @return None
486 *
487 * @details This macro enable specified UART PDMA function.
488 * \hideinitializer
489 */
490 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel))
491 /**
492 * @brief Disable specified UART PDMA function
493 *
494 * @param[in] uart The pointer of the specified UART module
495 * @param[in] u32FuncSel Combination of following functions
496 * - \ref UART_INTEN_TXPDMAEN_Msk
497 * - \ref UART_INTEN_RXPDMAEN_Msk
498 *
499 * @return None
500 *
501 * @details This macro disable specified UART PDMA function.
502 * \hideinitializer
503 */
504 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
505
506
507 void UART_ClearIntFlag(UART_T* uart, uint32_t u32InterruptFlag);
508 void UART_Close(UART_T* uart);
509 void UART_DisableFlowCtrl(UART_T* uart);
510 void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag);
511 void UART_EnableFlowCtrl(UART_T* uart);
512 void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag);
513 void UART_Open(UART_T* uart, uint32_t u32baudrate);
514 uint32_t UART_Read(UART_T* uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes);
515 void UART_SetLine_Config(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
516 void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
517 void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
518 void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
519 void UART_SelectLINMode(UART_T* uart, uint32_t u32Mode, uint32_t u32BreakLength);
520 uint32_t UART_Write(UART_T* uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes);
521 void UART_SelectSingleWireMode(UART_T *uart);
522
523 #define UART_SetLineConfig UART_SetLine_Config
524
525
526 /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
527
528 /*@}*/ /* end of group UART_Driver */
529
530 /*@}*/ /* end of group Standard_Driver */
531
532 #ifdef __cplusplus
533 }
534 #endif
535
536 #endif /*__UART_H__*/
537
