1 /**************************************************************************//** 2 * @file hsotg.h 3 * @version V3.00 4 * @brief M460 series HSOTG driver header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved. 8 ****************************************************************************/ 9 #ifndef __HSOTG_H__ 10 #define __HSOTG_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup HSOTG_Driver HSOTG Driver 23 @{ 24 */ 25 26 27 /** @addtogroup HSOTG_EXPORTED_CONSTANTS HSOTG Exported Constants 28 @{ 29 */ 30 31 32 33 /*---------------------------------------------------------------------------------------------------------*/ 34 /* HSOTG constant definitions */ 35 /*---------------------------------------------------------------------------------------------------------*/ 36 #define HSOTG_VBUS_EN_ACTIVE_HIGH (0UL) /*!< USB VBUS power switch enable signal is active high. \hideinitializer */ 37 #define HSOTG_VBUS_EN_ACTIVE_LOW (1UL) /*!< USB VBUS power switch enable signal is active low. \hideinitializer */ 38 #define HSOTG_VBUS_ST_VALID_HIGH (0UL) /*!< USB VBUS power switch valid status is high. \hideinitializer */ 39 #define HSOTG_VBUS_ST_VALID_LOW (1UL) /*!< USB VBUS power switch valid status is low. \hideinitializer */ 40 41 #define HSOTG_PHYCTL_FSEL_9_6M (0UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 9.6 MHz. \hideinitializer */ 42 #define HSOTG_PHYCTL_FSEL_10_0M (1UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 10 MHz. \hideinitializer */ 43 #define HSOTG_PHYCTL_FSEL_12_0M (2UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 12 MHz. \hideinitializer */ 44 #define HSOTG_PHYCTL_FSEL_19_2M (3UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 19.2 MHz. \hideinitializer */ 45 #define HSOTG_PHYCTL_FSEL_20_0M (4UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 20 MHz. \hideinitializer */ 46 #define HSOTG_PHYCTL_FSEL_24_0M (5UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 24 MHz. \hideinitializer */ 47 #define HSOTG_PHYCTL_FSEL_50_0M (7UL << HSOTG_PHYCTL_FSEL_Pos) /*!< Setting OTG PHY reference clock frequency as 50 MHz. \hideinitializer */ 48 49 50 /*@}*/ /* end of group HSOTG_EXPORTED_CONSTANTS */ 51 52 53 /** @addtogroup HSOTG_EXPORTED_FUNCTIONS HSOTG Exported Functions 54 @{ 55 */ 56 57 /*---------------------------------------------------------------------------------------------------------*/ 58 /* Define Macros and functions */ 59 /*---------------------------------------------------------------------------------------------------------*/ 60 61 62 /** 63 * @brief This macro is used to enable HSOTG function 64 * @param None 65 * @return None 66 * @details This macro will set OTGEN bit of HSOTG_CTL register to enable HSOTG function. 67 * \hideinitializer 68 */ 69 #define HSOTG_ENABLE() (HSOTG->CTL |= HSOTG_CTL_OTGEN_Msk) 70 71 /** 72 * @brief This macro is used to disable HSOTG function 73 * @param None 74 * @return None 75 * @details This macro will clear OTGEN bit of HSOTG_CTL register to disable HSOTG function. 76 * \hideinitializer 77 */ 78 #define HSOTG_DISABLE() (HSOTG->CTL &= ~HSOTG_CTL_OTGEN_Msk) 79 80 /** 81 * @brief This macro is used to enable USB PHY 82 * @param None 83 * @return None 84 * @details When the USB role is selected as HSOTG device, use this macro to enable USB PHY. 85 * This macro will set OTGPHYEN bit of HSOTG_PHYCTL register to enable USB PHY. 86 * \hideinitializer 87 */ 88 #define HSOTG_ENABLE_PHY() (HSOTG->PHYCTL |= HSOTG_PHYCTL_OTGPHYEN_Msk) 89 90 /** 91 * @brief This macro is used to disable USB PHY 92 * @param None 93 * @return None 94 * @details This macro will clear OTGPHYEN bit of HSOTG_PHYCTL register to disable USB PHY. 95 * \hideinitializer 96 */ 97 #define HSOTG_DISABLE_PHY() (HSOTG->PHYCTL &= ~HSOTG_PHYCTL_OTGPHYEN_Msk) 98 99 /** 100 * @brief This macro is used to enable ID detection function 101 * @param None 102 * @return None 103 * @details This macro will set IDDETEN bit of HSOTG_PHYCTL register to enable ID detection function. 104 * \hideinitializer 105 */ 106 #define HSOTG_ENABLE_ID_DETECT() (HSOTG->PHYCTL |= HSOTG_PHYCTL_IDDETEN_Msk) 107 108 /** 109 * @brief This macro is used to disable ID detection function 110 * @param None 111 * @return None 112 * @details This macro will clear IDDETEN bit of HSOTG_PHYCTL register to disable ID detection function. 113 * \hideinitializer 114 */ 115 #define HSOTG_DISABLE_ID_DETECT() (HSOTG->PHYCTL &= ~HSOTG_PHYCTL_IDDETEN_Msk) 116 117 /** 118 * @brief This macro is used to enable HSOTG wake-up function 119 * @param None 120 * @return None 121 * @details This macro will set WKEN bit of HSOTG_CTL register to enable HSOTG wake-up function. 122 * \hideinitializer 123 */ 124 #define HSOTG_ENABLE_WAKEUP() (HSOTG->CTL |= HSOTG_CTL_WKEN_Msk) 125 126 /** 127 * @brief This macro is used to disable HSOTG wake-up function 128 * @param None 129 * @return None 130 * @details This macro will clear WKEN bit of HSOTG_CTL register to disable HSOTG wake-up function. 131 * \hideinitializer 132 */ 133 #define HSOTG_DISABLE_WAKEUP() (HSOTG->CTL &= ~HSOTG_CTL_WKEN_Msk) 134 135 /** 136 * @brief This macro is used to set the polarity of USB_VBUS_EN pin 137 * @param[in] u32Pol The polarity selection. Valid values are listed below. 138 * - \ref HSOTG_VBUS_EN_ACTIVE_HIGH 139 * - \ref HSOTG_VBUS_EN_ACTIVE_LOW 140 * @return None 141 * @details This macro is used to set the polarity of external USB VBUS power switch enable signal. 142 * \hideinitializer 143 */ 144 #define HSOTG_SET_VBUS_EN_POL(u32Pol) (HSOTG->PHYCTL = (HSOTG->PHYCTL & (~HSOTG_PHYCTL_VBENPOL_Msk)) | ((u32Pol) << HSOTG_PHYCTL_VBENPOL_Pos)) 145 146 /** 147 * @brief This macro is used to set the polarity of USB_VBUS_ST pin 148 * @param[in] u32Pol The polarity selection. Valid values are listed below. 149 * - \ref HSOTG_VBUS_ST_VALID_HIGH 150 * - \ref HSOTG_VBUS_ST_VALID_LOW 151 * @return None 152 * @details This macro is used to set the polarity of external USB VBUS power switch status signal. 153 * \hideinitializer 154 */ 155 #define HSOTG_SET_VBUS_STS_POL(u32Pol) (HSOTG->PHYCTL = (HSOTG->PHYCTL & (~HSOTG_PHYCTL_VBSTSPOL_Msk)) | ((u32Pol) << HSOTG_PHYCTL_VBSTSPOL_Pos)) 156 157 /** 158 * @brief This macro is used to enable HSOTG related interrupts 159 * @param[in] u32Mask The combination of interrupt source. Each bit corresponds to a interrupt source. Valid values are listed below. 160 * - \ref HSOTG_INTEN_ROLECHGIEN_Msk 161 * - \ref HSOTG_INTEN_VBEIEN_Msk 162 * - \ref HSOTG_INTEN_SRPFIEN_Msk 163 * - \ref HSOTG_INTEN_HNPFIEN_Msk 164 * - \ref HSOTG_INTEN_GOIDLEIEN_Msk 165 * - \ref HSOTG_INTEN_IDCHGIEN_Msk 166 * - \ref HSOTG_INTEN_PDEVIEN_Msk 167 * - \ref HSOTG_INTEN_HOSTIEN_Msk 168 * - \ref HSOTG_INTEN_BVLDCHGIEN_Msk 169 * - \ref HSOTG_INTEN_AVLDCHGIEN_Msk 170 * - \ref HSOTG_INTEN_VBCHGIEN_Msk 171 * - \ref HSOTG_INTEN_SECHGIEN_Msk 172 * - \ref HSOTG_INTEN_SRPDETIEN_Msk 173 * @return None 174 * @details This macro will enable HSOTG related interrupts specified by u32Mask parameter. 175 * \hideinitializer 176 */ 177 #define HSOTG_ENABLE_INT(u32Mask) (HSOTG->INTEN |= (u32Mask)) 178 179 /** 180 * @brief This macro is used to disable HSOTG related interrupts 181 * @param[in] u32Mask The combination of interrupt source. Each bit corresponds to a interrupt source. Valid values are listed below. 182 * - \ref HSOTG_INTEN_ROLECHGIEN_Msk 183 * - \ref HSOTG_INTEN_VBEIEN_Msk 184 * - \ref HSOTG_INTEN_SRPFIEN_Msk 185 * - \ref HSOTG_INTEN_HNPFIEN_Msk 186 * - \ref HSOTG_INTEN_GOIDLEIEN_Msk 187 * - \ref HSOTG_INTEN_IDCHGIEN_Msk 188 * - \ref HSOTG_INTEN_PDEVIEN_Msk 189 * - \ref HSOTG_INTEN_HOSTIEN_Msk 190 * - \ref HSOTG_INTEN_BVLDCHGIEN_Msk 191 * - \ref HSOTG_INTEN_AVLDCHGIEN_Msk 192 * - \ref HSOTG_INTEN_VBCHGIEN_Msk 193 * - \ref HSOTG_INTEN_SECHGIEN_Msk 194 * - \ref HSOTG_INTEN_SRPDETIEN_Msk 195 * @return None 196 * @details This macro will disable HSOTG related interrupts specified by u32Mask parameter. 197 * \hideinitializer 198 */ 199 #define HSOTG_DISABLE_INT(u32Mask) (HSOTG->INTEN &= ~(u32Mask)) 200 201 /** 202 * @brief This macro is used to get HSOTG related interrupt flags 203 * @param[in] u32Mask The combination of interrupt source. Each bit corresponds to a interrupt source. Valid values are listed below. 204 * - \ref HSOTG_INTSTS_ROLECHGIF_Msk 205 * - \ref HSOTG_INTSTS_VBEIF_Msk 206 * - \ref HSOTG_INTSTS_SRPFIF_Msk 207 * - \ref HSOTG_INTSTS_HNPFIF_Msk 208 * - \ref HSOTG_INTSTS_GOIDLEIF_Msk 209 * - \ref HSOTG_INTSTS_IDCHGIF_Msk 210 * - \ref HSOTG_INTSTS_PDEVIF_Msk 211 * - \ref HSOTG_INTSTS_HOSTIF_Msk 212 * - \ref HSOTG_INTSTS_BVLDCHGIF_Msk 213 * - \ref HSOTG_INTSTS_AVLDCHGIF_Msk 214 * - \ref HSOTG_INTSTS_VBCHGIF_Msk 215 * - \ref HSOTG_INTSTS_SECHGIF_Msk 216 * - \ref HSOTG_INTSTS_SRPDETIF_Msk 217 * @return Interrupt flags of selected sources. 218 * @details This macro will return HSOTG related interrupt flags specified by u32Mask parameter. 219 * \hideinitializer 220 */ 221 #define HSOTG_GET_INT_FLAG(u32Mask) (HSOTG->INTSTS & (u32Mask)) 222 223 /** 224 * @brief This macro is used to clear HSOTG related interrupt flags 225 * @param[in] u32Mask The combination of interrupt source. Each bit corresponds to a interrupt source. Valid values are listed below. 226 * - \ref HSOTG_INTSTS_ROLECHGIF_Msk 227 * - \ref HSOTG_INTSTS_VBEIF_Msk 228 * - \ref HSOTG_INTSTS_SRPFIF_Msk 229 * - \ref HSOTG_INTSTS_HNPFIF_Msk 230 * - \ref HSOTG_INTSTS_GOIDLEIF_Msk 231 * - \ref HSOTG_INTSTS_IDCHGIF_Msk 232 * - \ref HSOTG_INTSTS_PDEVIF_Msk 233 * - \ref HSOTG_INTSTS_HOSTIF_Msk 234 * - \ref HSOTG_INTSTS_BVLDCHGIF_Msk 235 * - \ref HSOTG_INTSTS_AVLDCHGIF_Msk 236 * - \ref HSOTG_INTSTS_VBCHGIF_Msk 237 * - \ref HSOTG_INTSTS_SECHGIF_Msk 238 * - \ref HSOTG_INTSTS_SRPDETIF_Msk 239 * @return None 240 * @details This macro will clear HSOTG related interrupt flags specified by u32Mask parameter. 241 * \hideinitializer 242 */ 243 #define HSOTG_CLR_INT_FLAG(u32Mask) (HSOTG->INTSTS = (u32Mask)) 244 245 /** 246 * @brief This macro is used to get HSOTG related status 247 * @param[in] u32Mask The combination of user specified source. Valid values are listed below. 248 * - \ref HSOTG_STATUS_OVERCUR_Msk 249 * - \ref HSOTG_STATUS_IDSTS_Msk 250 * - \ref HSOTG_STATUS_SESSEND_Msk 251 * - \ref HSOTG_STATUS_BVLD_Msk 252 * - \ref HSOTG_STATUS_AVLD_Msk 253 * - \ref HSOTG_STATUS_VBUSVLD_Msk 254 * - \ref HSOTG_STATUS_ASPERI_Msk 255 * - \ref HSOTG_STATUS_ASHOST_Msk 256 * @return The user specified status. 257 * @details This macro will return HSOTG related status specified by u32Mask parameter. 258 * \hideinitializer 259 */ 260 #define HSOTG_GET_STATUS(u32Mask) (HSOTG->STATUS & (u32Mask)) 261 262 /** 263 * @brief Set OTG PHY reference clock frequency 264 * @param[in] u32RefClock The reference clock selection. Valid values are listed below. 265 * - \ref HSOTG_PHYCTL_FSEL_9_6M 266 * - \ref HSOTG_PHYCTL_FSEL_10_0M 267 * - \ref HSOTG_PHYCTL_FSEL_12_0M 268 * - \ref HSOTG_PHYCTL_FSEL_19_2M 269 * - \ref HSOTG_PHYCTL_FSEL_20_0M 270 * - \ref HSOTG_PHYCTL_FSEL_24_0M 271 * - \ref HSOTG_PHYCTL_FSEL_50_0M 272 * @return None 273 * @details This macro set OTG PHY reference clock frequency. 274 * \hideinitializer 275 */ 276 #define HSOTG_SET_PHY_REF_CLK(u32RefClock) (HSOTG->PHYCTL = (HSOTG->PHYCTL & ~HSOTG_PHYCTL_FSEL_Msk) | (u32RefClock)) 277 278 279 280 /*@}*/ /* end of group HSOTG_EXPORTED_FUNCTIONS */ 281 282 /*@}*/ /* end of group HSOTG_Driver */ 283 284 /*@}*/ /* end of group Standard_Driver */ 285 286 #ifdef __cplusplus 287 } 288 #endif 289 290 #endif /* __HSOTG_H__ */ 291
