| /hal_microchip-latest/mec5/drivers/ |
| D | mec_ps2.c | 167 int mec_hal_ps2_girq_ctrl(struct mec_ps2_regs *base, uint8_t enable) in mec_hal_ps2_girq_ctrl() argument
175 mec_hal_girq_ctrl(psi->devi, enable); in mec_hal_ps2_girq_ctrl()
204 int mec_hal_ps2_girq_wake_enable(struct mec_ps2_regs *base, uint8_t port, uint8_t enable) in mec_hal_ps2_girq_wake_enable() argument
222 mec_hal_girq_ctrl(devi, enable); in mec_hal_ps2_girq_wake_enable()
288 int mec_hal_ps2_inst_wake_enable(uint8_t instance, uint8_t port, uint8_t enable) in mec_hal_ps2_inst_wake_enable() argument
295 int ret = mec_hal_ps2_girq_wake_enable(regs, port, enable); in mec_hal_ps2_inst_wake_enable()
320 void mec_hal_ps2_wake_enables(uint8_t enable) in mec_hal_ps2_wake_enables() argument
328 mec_hal_girq_ctrl(info->port_a_wake_devi, enable); in mec_hal_ps2_wake_enables()
329 if (!enable) { in mec_hal_ps2_wake_enables()
334 mec_hal_girq_ctrl(info->port_b_wake_devi, enable); in mec_hal_ps2_wake_enables()
[all …]
|
| D | mec_kscan.c | 95 int mec_hal_kscan_enable(struct mec_kscan_regs *regs, uint8_t enable) in mec_hal_kscan_enable() argument
103 if (enable) { in mec_hal_kscan_enable()
127 int mec_hal_kscan_kso_pre_drive_enable(struct mec_kscan_regs *regs, uint8_t enable) in mec_hal_kscan_kso_pre_drive_enable() argument
135 if (enable) { in mec_hal_kscan_kso_pre_drive_enable()
202 void mec_hal_kscan_wake_enable(uint8_t enable) in mec_hal_kscan_wake_enable() argument
208 if (enable) { in mec_hal_kscan_wake_enable()
|
| D | mec_bdp.c | 88 int mec_hal_bdp_activate(struct mec_bdp_regs *regs, uint8_t enable, uint8_t is_alias) in mec_hal_bdp_activate() argument
95 if (enable) { in mec_hal_bdp_activate()
101 if (enable) { in mec_hal_bdp_activate()
111 int mec_hal_bdp_girq_ctrl(struct mec_bdp_regs *regs, uint8_t enable) in mec_hal_bdp_girq_ctrl() argument
117 mec_hal_girq_ctrl(MEC_BDP_ECIA_INFO, enable); in mec_hal_bdp_girq_ctrl()
165 void mec_hal_bdp_intr_en(struct mec_bdp_regs *regs, uint8_t enable) in mec_hal_bdp_intr_en() argument
167 if (enable) { in mec_hal_bdp_intr_en()
|
| D | mec_wdt.c | 97 void mec_hal_wdt_intr_ctrl(struct mec_wdt_regs *regs, uint8_t enable) in mec_hal_wdt_intr_ctrl() argument
99 if (enable) { in mec_hal_wdt_intr_ctrl()
120 void mec_hal_wdt_girq_enable(struct mec_wdt_regs *regs, uint8_t enable) in mec_hal_wdt_girq_enable() argument
124 mec_hal_girq_ctrl(MEC5_WDT0_ECIA_INFO, (int)enable); in mec_hal_wdt_girq_enable()
158 void mec_hal_wdt_debug_stall(struct mec_wdt_regs *regs, uint8_t enable) in mec_hal_wdt_debug_stall() argument
160 if (enable) { in mec_hal_wdt_debug_stall()
|
| D | mec_espi_pc.h | 130 void mec_hal_espi_pc_girq_ctrl(uint8_t enable);
148 void mec_hal_espi_pc_ltr_girq_ctrl(uint8_t enable);
160 uint8_t enable);
161 int mec_hal_espi_iobar_enable(struct mec_espi_io_regs *base, uint8_t ldn, uint8_t enable);
171 int mec_hal_espi_mbar_enable(struct mec_espi_mem_regs *base, uint8_t ldn, uint8_t enable);
174 uint8_t enable);
219 uint8_t sram_bar_id, uint8_t enable);
|
| D | mec_tach.c | 119 void mec_hal_tach_enable(struct mec_tach_regs *regs, uint8_t enable) in mec_hal_tach_enable() argument
121 if (enable) { in mec_hal_tach_enable()
163 int mec_hal_tach_intr_enable(struct mec_tach_regs *regs, uint32_t intr_events, uint8_t enable) in mec_hal_tach_intr_enable() argument
184 if (enable) { in mec_hal_tach_intr_enable()
205 void mec_hal_tach_girq_enable(struct mec_tach_regs *regs, uint8_t enable) in mec_hal_tach_girq_enable() argument
213 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_tach_girq_enable()
|
| D | mec_peci.c | 113 int mec_hal_peci_enable(struct mec_peci_regs *regs, uint8_t enable) in mec_hal_peci_enable() argument
121 if (enable) { in mec_hal_peci_enable()
167 int mec_hal_peci_global_ien(struct mec_peci_regs *regs, uint8_t enable) in mec_hal_peci_global_ien() argument
175 if (enable) { in mec_hal_peci_global_ien()
187 int mec_hal_peci_intr_ctrl(struct mec_peci_regs *regs, uint8_t enable, uint16_t intr_bitmap) in mec_hal_peci_intr_ctrl() argument
195 if (enable) { in mec_hal_peci_intr_ctrl()
231 int mec_hal_peci_tx_enable(struct mec_peci_regs *regs, uint8_t enable) in mec_hal_peci_tx_enable() argument
239 if (enable) { in mec_hal_peci_tx_enable()
|
| D | mec_ps2_api.h | 76 int mec_hal_ps2_girq_ctrl(struct mec_ps2_regs *base, uint8_t enable);
80 int mec_hal_ps2_girq_wake_enable(struct mec_ps2_regs *base, uint8_t port, uint8_t enable);
90 int mec_hal_ps2_inst_wake_enable(uint8_t instance, uint8_t port, uint8_t enable);
98 void mec_hal_ps2_wake_enables(uint8_t enable);
|
| D | mec_ecs.c | 67 void mec_hal_ecs_etm_pins(uint8_t enable) in mec_hal_ecs_etm_pins() argument
69 if (enable) { in mec_hal_ecs_etm_pins()
153 void mec_hal_ecs_emb_reset_enable(uint8_t enable) in mec_hal_ecs_emb_reset_enable() argument
155 if (enable) { in mec_hal_ecs_emb_reset_enable()
191 void mec_hal_ecs_peci_vtt_ref_pin_ctrl(uint8_t enable) in mec_hal_ecs_peci_vtt_ref_pin_ctrl() argument
193 if (enable) { in mec_hal_ecs_peci_vtt_ref_pin_ctrl()
|
| D | mec_espi_host_dev.c | 114 uint16_t io_base, uint8_t enable) in mec_hal_espi_iobar_cfg() argument
133 if (enable) { in mec_hal_espi_iobar_cfg()
140 int mec_hal_espi_iobar_enable(struct mec_espi_io_regs *base, uint8_t ldn, uint8_t enable) in mec_hal_espi_iobar_enable() argument
155 if (enable) { in mec_hal_espi_iobar_enable()
240 uint32_t mem_base, uint8_t enable) in mec_hal_espi_mbar_cfg() argument
261 if (enable) { in mec_hal_espi_mbar_cfg()
270 uint8_t sram_bar_id, uint8_t enable) in mec_hal_espi_sram_bar_cfg() argument
294 if (enable) { in mec_hal_espi_sram_bar_cfg()
329 int mec_hal_espi_mbar_enable(struct mec_espi_mem_regs *base, uint8_t ldn, uint8_t enable) in mec_hal_espi_mbar_enable() argument
346 if (enable) { in mec_hal_espi_mbar_enable()
|
| D | mec_eeprom.c | 73 int mec_hal_eeprom_girq_ctrl(struct mec_eeprom_ctrl_regs *regs, uint8_t enable) in mec_hal_eeprom_girq_ctrl() argument
79 mec_hal_girq_ctrl(MEC_EEPROM_ECIA_INFO, enable); in mec_hal_eeprom_girq_ctrl()
95 int mec_hal_eeprom_activate(struct mec_eeprom_ctrl_regs *regs, uint8_t enable) in mec_hal_eeprom_activate() argument
101 if (enable) { in mec_hal_eeprom_activate()
143 int mec_hal_eeprom_intr_en(struct mec_eeprom_ctrl_regs *regs, uint8_t enable, uint32_t flags) in mec_hal_eeprom_intr_en() argument
153 if (enable) { in mec_hal_eeprom_intr_en()
159 if (enable) { in mec_hal_eeprom_intr_en()
|
| D | mec_peci_api.h | 79 int mec_hal_peci_enable(struct mec_peci_regs *regs, uint8_t enable);
81 int mec_hal_peci_global_ien(struct mec_peci_regs *regs, uint8_t enable);
82 int mec_hal_peci_intr_ctrl(struct mec_peci_regs *regs, uint8_t enable, uint16_t intr_bitmap);
86 int mec_hal_peci_tx_enable(struct mec_peci_regs *regs, uint8_t enable);
|
| D | mec_wdt_api.h | 38 void mec_hal_wdt_intr_ctrl(struct mec_wdt_regs *regs, uint8_t enable);
40 void mec_hal_wdt_girq_enable(struct mec_wdt_regs *regs, uint8_t enable);
56 void mec_hal_wdt_debug_stall(struct mec_wdt_regs *regs, uint8_t enable);
|
| D | mec_ecs_api.h | 49 void mec_hal_ecs_peci_vtt_ref_pin_ctrl(uint8_t enable);
55 void mec_ecs_etm_pins(uint8_t enable);
79 void mec_hal_ecs_emb_reset_enable(uint8_t enable);
|
| D | mec_tach_api.h | 72 void mec_hal_tach_enable(struct mec_tach_regs *regs, uint8_t enable);
79 int mec_hal_tach_intr_enable(struct mec_tach_regs *regs, uint32_t intr_events, uint8_t enable);
82 void mec_hal_tach_girq_enable(struct mec_tach_regs *regs, uint8_t enable);
|
| D | mec_adc_api.h | 87 int mec_hal_adc_activate(struct mec_adc_regs *regs, uint8_t enable);
89 int mec_hal_adc_girq_ctrl(struct mec_adc_regs *regs, uint32_t flags, uint8_t enable);
100 int mec_hal_adc_differential_input_enable(struct mec_adc_regs *regs, uint8_t enable);
|
| D | mec_ecia_api.h | 72 void mec_hal_girq_ctrl(uint32_t devi, int enable);
79 int mec_hal_girq_bm_en(uint32_t girq_num, uint32_t bitmap, uint8_t enable);
88 int mec_hal_ecia_girq_aggr_enable(uint32_t girq_num, uint8_t enable);
|
| D | mec_eeprom_api.h | 63 int mec_hal_eeprom_activate(struct mec_eeprom_ctrl_regs *regs, uint8_t enable);
65 int mec_hal_eeprom_girq_ctrl(struct mec_eeprom_ctrl_regs *regs, uint8_t enable);
72 int mec_hal_eeprom_intr_en(struct mec_eeprom_ctrl_regs *regs, uint8_t enable, uint32_t flags);
|
| D | mec_bdp_api.h | 96 int mec_hal_bdp_activate(struct mec_bdp_regs *regs, uint8_t enable, uint8_t is_alias);
98 void mec_hal_bdp_intr_en(struct mec_bdp_regs *regs, uint8_t enable);
100 int mec_hal_bdp_girq_ctrl(struct mec_bdp_regs *regs, uint8_t enable);
|
| D | mec_bclink.c | 78 int mec_hal_bcl_soft_reset(struct mec_bcl_regs *regs, uint8_t enable) in mec_hal_bcl_soft_reset() argument
86 if (enable) { in mec_hal_bcl_soft_reset()
205 int mec_hal_bcl_intr_ctrl(struct mec_bcl_regs *regs, uint8_t msk, uint8_t enable) in mec_hal_bcl_intr_ctrl() argument
217 if (enable) { in mec_hal_bcl_intr_ctrl()
224 if (enable) { in mec_hal_bcl_intr_ctrl()
|
| D | mec_btimer.c | 199 int mec_hal_btimer_girq_ctrl(struct mec_btmr_regs *regs, uint8_t enable) in mec_hal_btimer_girq_ctrl() argument
207 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_btimer_girq_ctrl()
291 void mec_hal_btimer_auto_restart(struct mec_btmr_regs *regs, uint8_t enable) in mec_hal_btimer_auto_restart() argument
293 if (enable) { in mec_hal_btimer_auto_restart()
326 void mec_hal_btimer_intr_en(struct mec_btmr_regs *regs, uint8_t enable) in mec_hal_btimer_intr_en() argument
328 if (enable) { in mec_hal_btimer_intr_en()
|
| D | mec_bbled_api.h | 107 void mec_hal_bbled_synchronize_enable(struct mec_bbled_regs *regs, uint8_t enable);
109 void mec_hal_bbled_asym_enable(struct mec_bbled_regs *regs, uint8_t enable);
152 int mec_hal_bbled_girq_ctrl(struct mec_bbled_regs *regs, uint8_t enable);
|
| D | mec_rtimer_api.h | 49 void mec_hal_rtimer_intr_ctrl(struct mec_rtmr_regs *regs, uint8_t enable);
51 static inline void mec_hal_rtimer_auto_reload(struct mec_rtmr_regs *regs, uint8_t enable) in mec_hal_rtimer_auto_reload() argument
53 if (enable) { in mec_hal_rtimer_auto_reload()
|
| D | mec_adc.c | 110 int mec_hal_adc_activate(struct mec_adc_regs *regs, uint8_t enable) in mec_hal_adc_activate() argument
120 if (enable) { in mec_hal_adc_activate()
183 int mec_hal_adc_differential_input_enable(struct mec_adc_regs *regs, uint8_t enable) in mec_hal_adc_differential_input_enable() argument
189 if (enable) { in mec_hal_adc_differential_input_enable()
223 int mec_hal_adc_girq_ctrl(struct mec_adc_regs *regs, uint32_t flags, uint8_t enable) in mec_hal_adc_girq_ctrl() argument
232 mec_hal_girq_bm_en(MEC_ADC_GIRQ, bm, enable); in mec_hal_adc_girq_ctrl()
|
| D | mec_vci.c | 69 int mec_hal_vci_in_filter_enable(struct mec_vci_regs *regs, uint8_t enable) in mec_hal_vci_in_filter_enable() argument
75 if (enable) { in mec_hal_vci_in_filter_enable()
103 int mec_hal_vci_sw_vci_out_enable(struct mec_vci_regs *regs, uint8_t enable) in mec_hal_vci_sw_vci_out_enable() argument
109 if (enable) { /* VCI_OUT pin state is set by bit[10] of this register */ in mec_hal_vci_sw_vci_out_enable()
|
