1 /*
2 * Copyright 2024 Microchip Technology Inc. and its subsidiaries.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #ifndef _MEC_RTIMER_API_H
7 #define _MEC_RTIMER_API_H
8
9 #include <stdbool.h>
10 #include <stddef.h>
11 #include <stdint.h>
12
13 #include "device_mec5.h"
14 #include "mec_defs.h"
15 #include "mec_retval.h"
16
17 /* Microchip MEC5 32KHz RTOS Timer. 32-bit down counter */
18
19 /* Interfaces to any C modules */
20 #ifdef __cplusplus
21 extern "C"
22 {
23 #endif
24
25 #define MEC_RTIMER_MAIN_CLK_FREQ 32768u
26 #define MEC_RTIMER_COUNT_SIZE_BITS 32
27 #define MEC_RTIMER_COUNT_MAX 0xffffffffu
28
29 enum rtimer_config {
30 MEC_RTMR_CFG_EN_POS = 0,
31 MEC_RTMR_CFG_AUTO_RELOAD_POS,
32 MEC_RTMR_CFG_START_POS,
33 MEC_RTMR_CFG_DBG_HALT_POS,
34 MEC_RTMR_CFG_IEN_POS,
35 };
36
37 enum rtimer_status {
38 MEC_RTMR_STATUS_TERM_POS = 0, /* timer reached terminal value of 0 */
39 };
40
41 int mec_hal_rtimer_init(struct mec_rtmr_regs *regs, uint32_t rtmr_config, uint32_t preload);
42
43 void mec_hal_rtimer_restart(struct mec_rtmr_regs *regs, uint32_t new_count, uint8_t restart);
44
45 uint32_t mec_hal_rtimer_status(struct mec_rtmr_regs *regs);
46 void mec_hal_rtimer_status_clear(struct mec_rtmr_regs *regs, uint32_t status);
47 void mec_hal_rtimer_status_clear_all(struct mec_rtmr_regs *regs);
48
49 void mec_hal_rtimer_intr_ctrl(struct mec_rtmr_regs *regs, uint8_t enable);
50
mec_hal_rtimer_auto_reload(struct mec_rtmr_regs * regs,uint8_t enable)51 static inline void mec_hal_rtimer_auto_reload(struct mec_rtmr_regs *regs, uint8_t enable)
52 {
53 if (enable) {
54 regs->CTRL |= MEC_BIT(MEC_RTMR_CTRL_AUTO_RELOAD_Pos);
55 } else {
56 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_RTMR_CTRL_AUTO_RELOAD_Pos);
57 }
58 }
59
mec_hal_rtimer_stop(struct mec_rtmr_regs * regs)60 static inline void mec_hal_rtimer_stop(struct mec_rtmr_regs *regs)
61 {
62 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_RTMR_CTRL_START_Pos);
63 }
64
mec_hal_rtimer_start(struct mec_rtmr_regs * regs)65 static inline void mec_hal_rtimer_start(struct mec_rtmr_regs *regs)
66 {
67 regs->CTRL |= MEC_BIT(MEC_RTMR_CTRL_START_Pos);
68 }
69
mec_hal_rtimer_is_started(struct mec_rtmr_regs * regs)70 static inline bool mec_hal_rtimer_is_started(struct mec_rtmr_regs *regs)
71 {
72 return (regs->CTRL & MEC_BIT(MEC_RTMR_CTRL_START_Pos)) ? true : false;
73 }
74
mec_hal_rtimer_count(struct mec_rtmr_regs * regs)75 static inline uint32_t mec_hal_rtimer_count(struct mec_rtmr_regs *regs)
76 {
77 return regs->COUNT;
78 }
79
mec_hal_rtimer_preload(struct mec_rtmr_regs * regs)80 static inline uint32_t mec_hal_rtimer_preload(struct mec_rtmr_regs *regs)
81 {
82 return regs->PRELOAD;
83 }
84
85 /* If preload is written while the timer is running the value will
86 * only take effect if auto-restart is enabled and timer reaches
87 * its terminal count value of 0
88 */
mec_hal_rtimer_preload_set(struct mec_rtmr_regs * regs,uint32_t preload)89 static inline void mec_hal_rtimer_preload_set(struct mec_rtmr_regs *regs, uint32_t preload)
90 {
91 regs->PRELOAD = preload;
92 }
93
mec_hal_rtimer_halt(struct mec_rtmr_regs * regs)94 static inline void mec_hal_rtimer_halt(struct mec_rtmr_regs *regs)
95 {
96 regs->CTRL |= MEC_BIT(MEC_RTMR_CTRL_FW_HALT_Pos);
97 }
98
mec_hal_rtimer_unhalt(struct mec_rtmr_regs * regs)99 static inline void mec_hal_rtimer_unhalt(struct mec_rtmr_regs *regs)
100 {
101 regs->CTRL &= (uint32_t)~MEC_BIT(MEC_RTMR_CTRL_FW_HALT_Pos);
102 }
103
mec_hal_rtimer_is_counting(struct mec_rtmr_regs * regs)104 static inline bool mec_hal_rtimer_is_counting(struct mec_rtmr_regs *regs)
105 {
106 return (regs->COUNT != 0) ? true : false;
107 }
108
109 #define MEC_RTIMER_START 0x05u
110 /* Start with auto-halt while CPU is halted by debugger */
111 #define MEC_RTIMER_START_EXT_HALT 0x0du
112
mec_hal_rtimer_stop_and_load(struct mec_rtmr_regs * regs,uint32_t count_down,uint8_t start_val)113 static inline void mec_hal_rtimer_stop_and_load(struct mec_rtmr_regs *regs, uint32_t count_down,
114 uint8_t start_val)
115 {
116 regs->CTRL = 0U;
117 regs->CTRL = MEC_BIT(MEC_RTMR_CTRL_ENABLE_Pos);
118 regs->PRELOAD = count_down;
119 regs->CTRL = start_val;
120 }
121
122 #ifdef __cplusplus
123 }
124 #endif
125
126 #endif /* #ifndef _MEC_RTIMER_API_H */
127
