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Searched refs:SRSS_VEXT_REF_REG_PORT (Results 1 – 23 of 23) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dgpio_tviibe1m_64_lqfp.h362 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe2m_64_lqfp.h362 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe4m_64_lqfp.h362 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe1m_80_lqfp.h434 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe2m_80_lqfp.h434 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe4m_80_lqfp.h434 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe1m_100_lqfp.h508 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe2m_100_lqfp.h508 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe4m_100_lqfp.h508 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe1m_144_lqfp.h730 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe2m_144_lqfp.h730 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe4m_144_lqfp.h730 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe1m_176_lqfp.h872 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe4m_176_lqfp.h872 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviibe2m_176_lqfp.h872 #define SRSS_VEXT_REF_REG_PORT 21u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dgpio_xmc7100_100_teqfp.h484 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_xmc7100_144_teqfp.h706 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_tviic2d6m_327_bga.h917 #define SRSS_VEXT_REF_REG_PORT 1u macro
Dgpio_xmc7100_176_teqfp.h862 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_xmc7200_176_teqfp.h898 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_xmc7100_272_bga.h1184 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_xmc7200_272_bga.h1234 #define SRSS_VEXT_REF_REG_PORT 21u macro
Dgpio_xmc7200_320_bga.h1318 #define SRSS_VEXT_REF_REG_PORT 21u macro