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Searched refs:P20_3_TCPWM0_LINE_COMPL48 (Results 1 – 18 of 18) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dgpio_xmc7100_144_teqfp.h2220 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_xmc7100_176_teqfp.h2702 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_xmc7100_272_bga.h3141 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dgpio_tviibe1m_144_lqfp.h2145 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_tviibe2m_144_lqfp.h2208 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_tviibe4m_144_lqfp.h2208 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_tviibe1m_176_lqfp.h2558 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_tviibe4m_176_lqfp.h2632 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
Dgpio_tviibe2m_176_lqfp.h2632 P20_3_TCPWM0_LINE_COMPL48 = 9, /* Digital Active - tcpwm[0].line_compl[48]:1 */ enumerator
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_tviibe1m_144_lqfp.c868 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_tviibe2m_144_lqfp.c933 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_tviibe4m_144_lqfp.c933 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_tviibe1m_176_lqfp.c991 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_tviibe4m_176_lqfp.c1067 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_tviibe2m_176_lqfp.c1067 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1C/source/pin_packages/
Dcyhal_xmc7100_144_teqfp.c1173 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_xmc7100_176_teqfp.c1340 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},
Dcyhal_xmc7100_272_bga.c1462 {0u, 48u, P20_3, P20_3_TCPWM0_LINE_COMPL48},