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Searched refs:DBG_CTL1 (Results 1 – 6 of 6) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_dbg.c48 DBG_CTL1 = DBG_RESET_VAL; in dbg_deinit()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_dbg.c50 DBG_CTL1 = DBG_RESET_VAL; in dbg_deinit()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_dbg.c51 DBG_CTL1 = DBG_RESET_VAL; in dbg_deinit()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_dbg.h46 #define DBG_CTL1 REG32(DBG + 0x00000008U) /*!< DBG control register 1 */ macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dbg.h48 #define DBG_CTL1 REG32(DBG + 0x00000008U) /*!< DBG control register 1 */ macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_dbg.h49 #define DBG_CTL1 REG32(DBG + 0x08U) /*!< DBG control register 1 */ macro