Searched refs:CFG1_PLL2MF (Results 1 – 4 of 4) sorted by relevance
1059 #define CFG1_PLL2MF(regval) (BITS(12,15) & ((uint32_t)(regval) << 12)) macro1060 #define RCU_PLL2_MUL8 CFG1_PLL2MF(6) /*!< PLL2 source clock …1061 #define RCU_PLL2_MUL9 CFG1_PLL2MF(7) /*!< PLL2 source clock …1062 #define RCU_PLL2_MUL10 CFG1_PLL2MF(8) /*!< PLL2 source clock …1063 #define RCU_PLL2_MUL11 CFG1_PLL2MF(9) /*!< PLL2 source clock …1064 #define RCU_PLL2_MUL12 CFG1_PLL2MF(10) /*!< PLL2 source clock …1065 #define RCU_PLL2_MUL13 CFG1_PLL2MF(11) /*!< PLL2 source clock …1066 #define RCU_PLL2_MUL14 CFG1_PLL2MF(12) /*!< PLL2 source clock …1067 #define RCU_PLL2_MUL16 CFG1_PLL2MF(14) /*!< PLL2 source clock …1068 #define RCU_PLL2_MUL20 CFG1_PLL2MF(15) /*!< PLL2 source clock …[all …]
725 #define CFG1_PLL2MF(regval) (BITS(12,15) & ((uint32_t)(regval) << 12)) macro726 #define RCU_PLL2_MUL8 CFG1_PLL2MF(6) /*!< PLL2 source clock …727 #define RCU_PLL2_MUL9 CFG1_PLL2MF(7) /*!< PLL2 source clock …728 #define RCU_PLL2_MUL10 CFG1_PLL2MF(8) /*!< PLL2 source clock …729 #define RCU_PLL2_MUL11 CFG1_PLL2MF(9) /*!< PLL2 source clock …730 #define RCU_PLL2_MUL12 CFG1_PLL2MF(10) /*!< PLL2 source clock …731 #define RCU_PLL2_MUL13 CFG1_PLL2MF(11) /*!< PLL2 source clock …732 #define RCU_PLL2_MUL14 CFG1_PLL2MF(12) /*!< PLL2 source clock …733 #define RCU_PLL2_MUL15 CFG1_PLL2MF(13) /*!< PLL2 source clock …734 #define RCU_PLL2_MUL16 CFG1_PLL2MF(14) /*!< PLL2 source clock …[all …]
591 #define CFG1_PLL2MF(regval) (BITS(12,15) & ((uint32_t)(regval) << 12)) macro592 #define RCU_PLL2_MUL8 CFG1_PLL2MF(6) /*!< PLL2 source clock …593 #define RCU_PLL2_MUL9 CFG1_PLL2MF(7) /*!< PLL2 source clock …594 #define RCU_PLL2_MUL10 CFG1_PLL2MF(8) /*!< PLL2 source clock …595 #define RCU_PLL2_MUL11 CFG1_PLL2MF(9) /*!< PLL2 source clock …596 #define RCU_PLL2_MUL12 CFG1_PLL2MF(10) /*!< PLL2 source clock …597 #define RCU_PLL2_MUL13 CFG1_PLL2MF(11) /*!< PLL2 source clock …598 #define RCU_PLL2_MUL14 CFG1_PLL2MF(12) /*!< PLL2 source clock …599 #define RCU_PLL2_MUL15 CFG1_PLL2MF(13) /*!< PLL2 source clock …600 #define RCU_PLL2_MUL16 CFG1_PLL2MF(14) /*!< PLL2 source clock …[all …]
683 #define CFG1_PLL2MF(regval) (BITS(12,15) & ((uint32_t)(regval) << 12)) macro684 #define RCU_PLL2_MUL8 CFG1_PLL2MF(6) /*!< PLL2 source clock …685 #define RCU_PLL2_MUL9 CFG1_PLL2MF(7) /*!< PLL2 source clock …686 #define RCU_PLL2_MUL10 CFG1_PLL2MF(8) /*!< PLL2 source clock …687 #define RCU_PLL2_MUL11 CFG1_PLL2MF(9) /*!< PLL2 source clock …688 #define RCU_PLL2_MUL12 CFG1_PLL2MF(10) /*!< PLL2 source clock …689 #define RCU_PLL2_MUL13 CFG1_PLL2MF(11) /*!< PLL2 source clock …690 #define RCU_PLL2_MUL14 CFG1_PLL2MF(12) /*!< PLL2 source clock …691 #define RCU_PLL2_MUL16 CFG1_PLL2MF(14) /*!< PLL2 source clock …692 #define RCU_PLL2_MUL20 CFG1_PLL2MF(15) /*!< PLL2 source clock …
