Lines Matching refs:CFG1_PLL2MF
1059 #define CFG1_PLL2MF(regval) (BITS(12,15) & ((uint32_t)(regval) << 12)) macro
1060 #define RCU_PLL2_MUL8 CFG1_PLL2MF(6) /*!< PLL2 source clock …
1061 #define RCU_PLL2_MUL9 CFG1_PLL2MF(7) /*!< PLL2 source clock …
1062 #define RCU_PLL2_MUL10 CFG1_PLL2MF(8) /*!< PLL2 source clock …
1063 #define RCU_PLL2_MUL11 CFG1_PLL2MF(9) /*!< PLL2 source clock …
1064 #define RCU_PLL2_MUL12 CFG1_PLL2MF(10) /*!< PLL2 source clock …
1065 #define RCU_PLL2_MUL13 CFG1_PLL2MF(11) /*!< PLL2 source clock …
1066 #define RCU_PLL2_MUL14 CFG1_PLL2MF(12) /*!< PLL2 source clock …
1067 #define RCU_PLL2_MUL16 CFG1_PLL2MF(14) /*!< PLL2 source clock …
1068 #define RCU_PLL2_MUL20 CFG1_PLL2MF(15) /*!< PLL2 source clock …
1069 #define RCU_PLL2_MUL18 (PLL2MF_4 | CFG1_PLL2MF(0)) /*!< PLL2 source clock …
1070 #define RCU_PLL2_MUL19 (PLL2MF_4 | CFG1_PLL2MF(1)) /*!< PLL2 source clock …
1071 #define RCU_PLL2_MUL21 (PLL2MF_4 | CFG1_PLL2MF(3)) /*!< PLL2 source clock …
1072 #define RCU_PLL2_MUL22 (PLL2MF_4 | CFG1_PLL2MF(4)) /*!< PLL2 source clock …
1073 #define RCU_PLL2_MUL23 (PLL2MF_4 | CFG1_PLL2MF(5)) /*!< PLL2 source clock …
1074 #define RCU_PLL2_MUL24 (PLL2MF_4 | CFG1_PLL2MF(6)) /*!< PLL2 source clock …
1075 #define RCU_PLL2_MUL25 (PLL2MF_4 | CFG1_PLL2MF(7)) /*!< PLL2 source clock …
1076 #define RCU_PLL2_MUL26 (PLL2MF_4 | CFG1_PLL2MF(8)) /*!< PLL2 source clock …
1077 #define RCU_PLL2_MUL27 (PLL2MF_4 | CFG1_PLL2MF(9)) /*!< PLL2 source clock …
1078 #define RCU_PLL2_MUL28 (PLL2MF_4 | CFG1_PLL2MF(10)) /*!< PLL2 source clock …
1079 #define RCU_PLL2_MUL29 (PLL2MF_4 | CFG1_PLL2MF(11)) /*!< PLL2 source clock …
1080 #define RCU_PLL2_MUL30 (PLL2MF_4 | CFG1_PLL2MF(12)) /*!< PLL2 source clock …
1081 #define RCU_PLL2_MUL31 (PLL2MF_4 | CFG1_PLL2MF(13)) /*!< PLL2 source clock …
1082 #define RCU_PLL2_MUL32 (PLL2MF_4 | CFG1_PLL2MF(14)) /*!< PLL2 source clock …
1083 #define RCU_PLL2_MUL40 (PLL2MF_4 | CFG1_PLL2MF(15)) /*!< PLL2 source clock …
1084 #define RCU_PLL2_MUL34 (PLL2MF_5 | CFG1_PLL2MF(0)) /*!< PLL2 source clock …
1085 #define RCU_PLL2_MUL35 (PLL2MF_5 | CFG1_PLL2MF(1)) /*!< PLL2 source clock …
1086 #define RCU_PLL2_MUL36 (PLL2MF_5 | CFG1_PLL2MF(2)) /*!< PLL2 source clock …
1087 #define RCU_PLL2_MUL37 (PLL2MF_5 | CFG1_PLL2MF(3)) /*!< PLL2 source clock …
1088 #define RCU_PLL2_MUL38 (PLL2MF_5 | CFG1_PLL2MF(4)) /*!< PLL2 source clock …
1089 #define RCU_PLL2_MUL39 (PLL2MF_5 | CFG1_PLL2MF(5)) /*!< PLL2 source clock …
1090 #define RCU_PLL2_MUL41 (PLL2MF_5 | CFG1_PLL2MF(7)) /*!< PLL2 source clock …
1091 #define RCU_PLL2_MUL42 (PLL2MF_5 | CFG1_PLL2MF(8)) /*!< PLL2 source clock …
1092 #define RCU_PLL2_MUL43 (PLL2MF_5 | CFG1_PLL2MF(9)) /*!< PLL2 source clock …
1093 #define RCU_PLL2_MUL44 (PLL2MF_5 | CFG1_PLL2MF(10)) /*!< PLL2 source clock …
1094 #define RCU_PLL2_MUL45 (PLL2MF_5 | CFG1_PLL2MF(11)) /*!< PLL2 source clock …
1095 #define RCU_PLL2_MUL46 (PLL2MF_5 | CFG1_PLL2MF(12)) /*!< PLL2 source clock …
1096 #define RCU_PLL2_MUL47 (PLL2MF_5 | CFG1_PLL2MF(13)) /*!< PLL2 source clock …
1097 #define RCU_PLL2_MUL48 (PLL2MF_5 | CFG1_PLL2MF(14)) /*!< PLL2 source clock …
1098 #define RCU_PLL2_MUL49 (PLL2MF_5 | CFG1_PLL2MF(15)) /*!< PLL2 source clock …
1099 #define RCU_PLL2_MUL50 (PLL2MF_4_5 | CFG1_PLL2MF(0)) /*!< PLL2 source clock …
1100 #define RCU_PLL2_MUL51 (PLL2MF_4_5 | CFG1_PLL2MF(1)) /*!< PLL2 source clock …
1101 #define RCU_PLL2_MUL52 (PLL2MF_4_5 | CFG1_PLL2MF(2)) /*!< PLL2 source clock …
1102 #define RCU_PLL2_MUL53 (PLL2MF_4_5 | CFG1_PLL2MF(3)) /*!< PLL2 source clock …
1103 #define RCU_PLL2_MUL54 (PLL2MF_4_5 | CFG1_PLL2MF(4)) /*!< PLL2 source clock …
1104 #define RCU_PLL2_MUL55 (PLL2MF_4_5 | CFG1_PLL2MF(5)) /*!< PLL2 source clock …
1105 #define RCU_PLL2_MUL56 (PLL2MF_4_5 | CFG1_PLL2MF(6)) /*!< PLL2 source clock …
1106 #define RCU_PLL2_MUL57 (PLL2MF_4_5 | CFG1_PLL2MF(7)) /*!< PLL2 source clock …
1107 #define RCU_PLL2_MUL58 (PLL2MF_4_5 | CFG1_PLL2MF(8)) /*!< PLL2 source clock …
1108 #define RCU_PLL2_MUL59 (PLL2MF_4_5 | CFG1_PLL2MF(9)) /*!< PLL2 source clock …
1109 #define RCU_PLL2_MUL60 (PLL2MF_4_5 | CFG1_PLL2MF(10)) /*!< PLL2 source clock …
1110 #define RCU_PLL2_MUL61 (PLL2MF_4_5 | CFG1_PLL2MF(11)) /*!< PLL2 source clock …
1111 #define RCU_PLL2_MUL62 (PLL2MF_4_5 | CFG1_PLL2MF(12)) /*!< PLL2 source clock …
1112 #define RCU_PLL2_MUL63 (PLL2MF_4_5 | CFG1_PLL2MF(13)) /*!< PLL2 source clock …
1113 #define RCU_PLL2_MUL64 (PLL2MF_4_5 | CFG1_PLL2MF(14)) /*!< PLL2 source clock …
1114 #define RCU_PLL2_MUL80 (PLL2MF_4_5 | CFG1_PLL2MF(15)) /*!< PLL2 source clock …