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Searched refs:cycles (Results 1 – 25 of 27) sorted by relevance

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/hal_espressif-latest/components/soc/esp32c6/include/soc/
Drtc.h46 #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) argument
47 #define RTC_SLOW_CLK_32K_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
48 #define RTC_FAST_CLK_20M_CAL_TIMEOUT_THRES(cycles) (TIMG_RTC_CALI_TIMEOUT_THRES_V) // Just use th… argument
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Drtc.h48 #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) argument
49 #define RTC_SLOW_CLK_32K_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
50 #define RTC_FAST_CLK_8M_CAL_TIMEOUT_THRES(cycles) (TIMG_RTC_CALI_TIMEOUT_THRES_V) // Just use th… argument
/hal_espressif-latest/components/xtensa/include/xtensa/
Dxtruntime.h218 extern void _xtos_timer_0_delta( int cycles );
221 extern void _xtos_timer_1_delta( int cycles );
224 extern void _xtos_timer_2_delta( int cycles );
227 extern void _xtos_timer_3_delta( int cycles );
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc.h48 #define RTC_SLOW_CLK_X32K_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
49 #define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
50 #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) argument
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc.h48 #define RTC_SLOW_CLK_X32K_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
49 #define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
50 #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) argument
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc.h49 #define RTC_SLOW_CLK_X32K_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
50 #define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
51 #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) argument
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc.h50 #define RTC_SLOW_CLK_X32K_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
51 #define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles) (cycles << 12) argument
52 #define RTC_SLOW_CLK_90K_CAL_TIMEOUT_THRES(cycles) (cycles << 10) argument
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/
DKconfig.rtc18 int "Number of cycles for RTC_SLOW_CLK calibration"
26 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
DKconfig.rtc20 int "Number of cycles for RTC_SLOW_CLK calibration"
28 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
DKconfig.rtc16 int "Number of cycles for RTC_SLOW_CLK calibration"
24 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
DKconfig.rtc20 int "Number of cycles for RTC_SLOW_CLK calibration"
28 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
DKconfig.rtc29 int "Number of cycles for RTC_SLOW_CLK calibration"
37 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
DKconfig.rtc35 int "Number of cycles for RTC_SLOW_CLK calibration"
43 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/hal/
Dspi_flash_hal_common.inc96 * transaction. We have to output all ones in these cycles because we don't need this feature.
139 // Add dummy cycles to compensate for latency of GPIO matrix and external delay, if necessary...
164 //No extra dummy cycles for compensation if no input data
/hal_espressif-latest/zephyr/esp32c3/src/bt/
Desp_bt_adapter.c157 uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
268 static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
747 static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr) in btdm_lpcycles_2_hus() argument
750 uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2; in btdm_lpcycles_2_hus()
769 uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us; in btdm_hus_2_lpcycles() local
770 cycles >>= 1; in btdm_hus_2_lpcycles()
772 return (uint32_t)cycles; in btdm_hus_2_lpcycles()
/hal_espressif-latest/zephyr/esp32s3/src/bt/
Desp_bt_adapter.c157 uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
266 static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
736 static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr) in btdm_lpcycles_2_hus() argument
739 uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2; in btdm_lpcycles_2_hus()
758 uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us; in btdm_hus_2_lpcycles() local
759 cycles >>= 1; in btdm_hus_2_lpcycles()
761 return (uint32_t)cycles; in btdm_hus_2_lpcycles()
/hal_espressif-latest/zephyr/esp32/src/bt/
Desp_bt_adapter.c129 uint32_t (*_btdm_lpcycles_2_us)(uint32_t cycles);
245 static uint32_t btdm_lpcycles_2_us(uint32_t cycles);
704 static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles) in btdm_lpcycles_2_us() argument
708 uint64_t us = (uint64_t)btdm_lpcycle_us * cycles; in btdm_lpcycles_2_us()
722 uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us; in btdm_us_2_lpcycles() local
724 return (uint32_t)cycles; in btdm_us_2_lpcycles()
/hal_espressif-latest/components/bt/controller/esp32c3/
Dbt.c192 uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
318 static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
735 static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr) in btdm_lpcycles_2_hus() argument
738 uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2; in btdm_lpcycles_2_hus()
756 uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us; in btdm_hus_2_lpcycles() local
757 cycles >>= 1; in btdm_hus_2_lpcycles()
759 return (uint32_t)cycles; in btdm_hus_2_lpcycles()
/hal_espressif-latest/components/esp_hw_support/port/esp32/
DKconfig.rtc67 int "Number of cycles for RTC_SLOW_CLK calibration"
75 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
/hal_espressif-latest/components/bt/controller/esp32/
Dbt.c152 uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
293 static uint32_t btdm_lpcycles_2_us(uint32_t cycles);
905 static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles) in btdm_lpcycles_2_us() argument
909 uint64_t us = (uint64_t)btdm_lpcycle_us * cycles; in btdm_lpcycles_2_us()
922 uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us; in btdm_us_2_lpcycles() local
924 return (uint32_t)cycles; in btdm_us_2_lpcycles()
/hal_espressif-latest/components/esp_system/port/soc/esp32/
DKconfig.memory42 Each unaligned read/write access will incur a penalty of maximum of 167 CPU cycles.
/hal_espressif-latest/components/spi_flash/
Dspi_flash_hpm_enable.c226 #warning HPM-DC, which helps to run some flash > 80MHz by adjusting dummy cycles, is no longer enab…
/hal_espressif-latest/tools/esptool_py/docs/en/espefuse/inc/
Dsummary_ESP32-P4.rst24 es. 2: 16 km cycles. 3: 32 km cycles
/hal_espressif-latest/components/esp_system/
DKconfig79 int "Bootstrap cycles for external 32kHz crystal"
86 we bootstrap it with a 32kHz square wave for a fixed number of cycles.
94 set a larger "Number of cycles for RTC_SLOW_CLK calibration" (about 3000).
/hal_espressif-latest/components/bt/host/nimble/
DKconfig.in32 and incur penalty of certain clock cycles per unaligned read/write.

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