1.. code-block:: none 2 3 > espefuse.py -p PORT summary 4 5 Connecting.... 6 Detecting chip type... ESP32-P4 7 8 === Run "summary" command === 9 EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value) 10 ---------------------------------------------------------------------------------------- 11 Config fuses: 12 WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000) 13 RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000) 14 POWERGLITCH_EN (BLOCK0) Represents whether power glitch function is enable = False R/W (0b0) 15 d. 1: enabled. 0: disabled 16 DIS_TWAI (BLOCK0) Represents whether TWAI function is disabled or en = False R/W (0b0) 17 abled. 1: disabled. 0: enabled 18 KM_HUK_GEN_STATE_LOW (BLOCK0) Set this bit to control validation of HUK generate = 0 R/W (0b000000) 19 mode. Odd of 1 is invalid; even of 1 is valid 20 KM_HUK_GEN_STATE_HIGH (BLOCK0) Set this bit to control validation of HUK generate = 0 R/W (0b000) 21 mode. Odd of 1 is invalid; even of 1 is valid 22 KM_RND_SWITCH_CYCLE (BLOCK0) Set bits to control key manager random number swit = 0 R/W (0b00) 23 ch cycle. 0: control by register. 1: 8 km clk cycl 24 es. 2: 16 km cycles. 3: 32 km cycles 25 KM_DEPLOY_ONLY_ONCE (BLOCK0) Set each bit to control whether corresponding key = 0 R/W (0x0) 26 can only be deployed once. 1 is true; 0 is false. 27 Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds 28 DIS_DIRECT_BOOT (BLOCK0) Represents whether direct boot mode is disabled or = False R/W (0b0) 29 enabled. 1: disabled. 0: enabled 30 UART_PRINT_CONTROL (BLOCK0) Represents the type of UART printing. 00: force en = 0 R/W (0b00) 31 able printing. 01: enable printing when GPIO8 is r 32 eset at low level. 10: enable printing when GPIO8 33 is reset at high level. 11: force disable printing 34 HYS_EN_PAD (BLOCK0) Represents whether the hysteresis function of corr = False R/W (0b0) 35 esponding PAD is enabled. 1: enabled. 0:disabled 36 DCDC_VSET (BLOCK0) Set the dcdc voltage default = 0 R/W (0b00000) 37 PXA0_TIEH_SEL_0 (BLOCK0) TBD = 0 R/W (0b00) 38 PXA0_TIEH_SEL_1 (BLOCK0) TBD = 0 R/W (0b00) 39 PXA0_TIEH_SEL_2 (BLOCK0) TBD = 0 R/W (0b00) 40 PXA0_TIEH_SEL_3 (BLOCK0) TBD = 0 R/W (0b00) 41 KM_DISABLE_DEPLOY_MODE (BLOCK0) TBD = 0 R/W (0x0) 42 HP_PWR_SRC_SEL (BLOCK0) HP system power source select. 0:LDO. 1: DCDC = False R/W (0b0) 43 DCDC_VSET_EN (BLOCK0) Select dcdc vset use efuse_dcdc_vset = False R/W (0b0) 44 DIS_SWD (BLOCK0) Set this bit to disable super-watchdog = False R/W (0b0) 45 BLOCK_SYS_DATA1 (BLOCK2) System data part 1 46 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 47 BLOCK_USR_DATA (BLOCK3) User data 48 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 49 BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved) 50 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 51 52 Flash fuses: 53 FLASH_TYPE (BLOCK0) The type of interfaced flash. 0: four data lines; = False R/W (0b0) 54 1: eight data lines 55 FLASH_PAGE_SIZE (BLOCK0) Set flash page size = 0 R/W (0b00) 56 FLASH_ECC_EN (BLOCK0) Set this bit to enable ecc for flash boot = False R/W (0b0) 57 FLASH_TPUW (BLOCK0) Represents the flash waiting time after power-up; = 0 R/W (0x0) 58 in unit of ms. When the value less than 15; the wa 59 iting time is the programmed value. Otherwise; the 60 waiting time is 2 times the programmed value 61 FORCE_SEND_RESUME (BLOCK0) Represents whether ROM code is forced to send a re = False R/W (0b0) 62 sume command during SPI boot. 1: forced. 0:not for 63 ced 64 65 Jtag fuses: 66 JTAG_SEL_ENABLE (BLOCK0) Represents whether the selection between usb_to_jt = False R/W (0b0) 67 ag and pad_to_jtag through strapping gpio15 when b 68 oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are 69 equal to 0 is enabled or disabled. 1: enabled. 0: 70 disabled 71 SOFT_DIS_JTAG (BLOCK0) Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000) 72 dd number: disabled. Even number: enabled 73 DIS_PAD_JTAG (BLOCK0) Represents whether JTAG is disabled in the hard wa = False R/W (0b0) 74 y(permanently). 1: disabled. 0: enabled 75 76 Mac fuses: 77 MAC (BLOCK1) MAC address 78 = 00:00:00:00:00:00 (OK) R/W 79 MAC_EXT (BLOCK1) Stores the extended bits of MAC address = 00:00 (OK) R/W 80 MAC_EUI64 (BLOCK1) calc MAC_EUI64 = MAC[0]:MAC[1]:MAC[2]:MAC_EXT[0]:M 81 = 00:00:00:00:00:00:00:00 (OK) R/W 82 AC_EXT[1]:MAC[3]:MAC[4]:MAC[5] 83 84 Security fuses: 85 DIS_FORCE_DOWNLOAD (BLOCK0) Represents whether the function that forces chip i = False R/W (0b0) 86 nto download mode is disabled or enabled. 1: disab 87 led. 0: enabled 88 SPI_DOWNLOAD_MSPI_DIS (BLOCK0) Set this bit to disable accessing MSPI flash/MSPI = False R/W (0b0) 89 ram by SYS AXI matrix during boot_mode_download 90 DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Represents whether flash encrypt function is disab = False R/W (0b0) 91 led or enabled(except in SPI boot mode). 1: disabl 92 ed. 0: enabled 93 FORCE_USE_KEY_MANAGER_KEY (BLOCK0) Set each bit to control whether corresponding key = 0 R/W (0x0) 94 must come from key manager.. 1 is true; 0 is false 95 . Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds 96 FORCE_DISABLE_SW_INIT_KEY (BLOCK0) Set this bit to disable software written init key; = False R/W (0b0) 97 and force use efuse_init_key 98 XTS_KEY_LENGTH_256 (BLOCK0) Set this bit to configure flash encryption use xts = False R/W (0b0) 99 -128 key; else use xts-256 key 100 SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000) 101 and disables otherwise 102 SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0) 103 SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0) 104 SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0) 105 KEY_PURPOSE_0 (BLOCK0) Represents the purpose of Key0 = USER R/W (0x0) 106 KEY_PURPOSE_1 (BLOCK0) Represents the purpose of Key1 = USER R/W (0x0) 107 KEY_PURPOSE_2 (BLOCK0) Represents the purpose of Key2 = USER R/W (0x0) 108 KEY_PURPOSE_3 (BLOCK0) Represents the purpose of Key3 = USER R/W (0x0) 109 KEY_PURPOSE_4 (BLOCK0) Represents the purpose of Key4 = USER R/W (0x0) 110 KEY_PURPOSE_5 (BLOCK0) Represents the purpose of Key5 = USER R/W (0x0) 111 SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring the = 0 R/W (0b00) 112 clock random divide mode 113 ECDSA_ENABLE_SOFT_K (BLOCK0) Represents whether hardware random number k is for = False R/W (0b0) 114 ced used in ESDCA. 1: force used. 0: not force use 115 d 116 CRYPT_DPA_ENABLE (BLOCK0) Represents whether anti-dpa attack is enabled. 1:e = False R/W (0b0) 117 nabled. 0: disabled 118 SECURE_BOOT_EN (BLOCK0) Represents whether secure boot is enabled or disab = False R/W (0b0) 119 led. 1: enabled. 0: disabled 120 SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Represents whether revoking aggressive secure boot = False R/W (0b0) 121 is enabled or disabled. 1: enabled. 0: disabled 122 DIS_DOWNLOAD_MODE (BLOCK0) Represents whether Download mode is disabled or en = False R/W (0b0) 123 abled. 1: disabled. 0: enabled 124 LOCK_KM_KEY (BLOCK0) TBD = False R/W (0b0) 125 ENABLE_SECURITY_DOWNLOAD (BLOCK0) Represents whether security download is enabled or = False R/W (0b0) 126 disabled. 1: enabled. 0: disabled 127 SECURE_VERSION (BLOCK0) Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000) 128 ck feature 129 SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0) Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0) 130 or enabled when Secure Boot is enabled. 1: disabl 131 ed. 0: enabled 132 BLOCK_KEY0 (BLOCK4) 133 Purpose: USER 134 Key0 or user data 135 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 136 BLOCK_KEY1 (BLOCK5) 137 Purpose: USER 138 Key1 or user data 139 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 140 BLOCK_KEY2 (BLOCK6) 141 Purpose: USER 142 Key2 or user data 143 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 144 BLOCK_KEY3 (BLOCK7) 145 Purpose: USER 146 Key3 or user data 147 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 148 BLOCK_KEY4 (BLOCK8) 149 Purpose: USER 150 Key4 or user data 151 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 152 BLOCK_KEY5 (BLOCK9) 153 Purpose: USER 154 Key5 or user data 155 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 156 157 Usb fuses: 158 USB_DEVICE_EXCHG_PINS (BLOCK0) Enable usb device exchange pins of D+ and D- = False R/W (0b0) 159 USB_OTG11_EXCHG_PINS (BLOCK0) Enable usb otg11 exchange pins of D+ and D- = False R/W (0b0) 160 DIS_USB_JTAG (BLOCK0) Represents whether the function of usb switch to j = False R/W (0b0) 161 tag is disabled or enabled. 1: disabled. 0: enable 162 d 163 USB_PHY_SEL (BLOCK0) TBD = False R/W (0b0) 164 DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download via USB-OTG = False R/W (0b0) 165 DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Represents whether print from USB-Serial-JTAG is d = False R/W (0b0) 166 isabled or enabled. 1: disabled. 0: enabled 167 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Represents whether the USB-Serial-JTAG download fu = False R/W (0b0) 168 nction is disabled or enabled. 1: disabled. 0: ena 169 bled 170 171 Wdt fuses: 172 WDT_DELAY_SEL (BLOCK0) Represents whether RTC watchdog timeout threshold = 0 R/W (0b00) 173 is selected at startup. 1: selected. 0: not select 174 ed 175 DIS_WDT (BLOCK0) Set this bit to disable watch dog = False R/W (0b0) 176
