1 /*
2 * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/kernel.h>
8 #include <zephyr/sys/printk.h>
9 #include <zephyr/random/random.h>
10
11 #include <stddef.h>
12 #include <stdlib.h>
13 #include <stdio.h>
14 #include <string.h>
15
16 #include "sdkconfig.h"
17 #include "xtensa/core-macros.h"
18 #include "esp_types.h"
19 #include "esp_mac.h"
20 #include "esp_random.h"
21 #include "esp_attr.h"
22 #include "esp_phy_init.h"
23 #include "esp_bt.h"
24 #include "esp_err.h"
25 #include "esp_log.h"
26 #include "esp_private/esp_clk.h"
27 #include "esp_private/periph_ctrl.h"
28 #include "soc/rtc.h"
29 #include "soc/soc_memory_layout.h"
30 #include "soc/dport_reg.h"
31 #include "private/esp_coexist_internal.h"
32 #include "esp_timer.h"
33 #include "esp_heap_adapter.h"
34
35 #include "esp_rom_sys.h"
36
37 #include <zephyr/logging/log.h>
38 LOG_MODULE_REGISTER(esp32_bt_adapter, CONFIG_LOG_DEFAULT_LEVEL);
39
40 #define BTDM_INIT_PERIOD (5000) /* ms */
41
42 /* Bluetooth system and controller config */
43 #define BTDM_CFG_BT_DATA_RELEASE (1 << 0)
44 #define BTDM_CFG_HCI_UART (1 << 1)
45 #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1 << 2)
46 #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1 << 3)
47 #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1 << 4)
48 #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1 << 5)
49
50 /* Sleep mode */
51 #define BTDM_MODEM_SLEEP_MODE_NONE (0)
52 #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
53 /* sleep mode for BLE controller, used only for internal test. */
54 #define BTDM_MODEM_SLEEP_MODE_EVED (2)
55
56 /* Low Power Clock Selection */
57 #define BTDM_LPCLK_SEL_XTAL (0)
58 #define BTDM_LPCLK_SEL_XTAL32K (1)
59 #define BTDM_LPCLK_SEL_RTC_SLOW (2)
60 #define BTDM_LPCLK_SEL_8M (3)
61
62 /* Sleep and wakeup interval control */
63 /* threshold of interval in slots to allow to fall into modem sleep */
64 #define BTDM_MIN_SLEEP_DURATION (12)
65 /* delay in slots of modem wake up procedure, including re-enable PHY/RF */
66 #define BTDM_MODEM_WAKE_UP_DELAY (4)
67
68 #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
69 #define OSI_VERSION 0x00010005
70 #define OSI_MAGIC_VALUE 0xFADEBEAD
71
72 /* VHCI function interface */
73 typedef struct vhci_host_callback {
74 /* callback used to notify that the host can send packet to controller */
75 void (*notify_host_send_available)(void);
76 /* callback used to notify that the controller has a packet to send to the host */
77 int (*notify_host_recv)(uint8_t *data, uint16_t len);
78 } vhci_host_callback_t;
79
80 /* Dram region */
81 typedef struct {
82 esp_bt_mode_t mode;
83 intptr_t start;
84 intptr_t end;
85 } btdm_dram_available_region_t;
86
87 /* bt queue */
88 struct bt_queue_t {
89 struct k_msgq queue;
90 void *pool;
91 };
92
93 /* OSI function */
94 struct osi_funcs_t {
95 uint32_t _version;
96 void (*_set_isr)(int n, void *f, void *arg);
97 void (*_ints_on)(unsigned int mask);
98 void (*_interrupt_disable)(void);
99 void (*_interrupt_restore)(void);
100 void (*_task_yield)(void);
101 void (*_task_yield_from_isr)(void);
102 void *(*_semphr_create)(uint32_t max, uint32_t init);
103 void (*_semphr_delete)(void *semphr);
104 int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
105 int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
106 int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
107 int32_t (*_semphr_give)(void *semphr);
108 void *(*_mutex_create)(void);
109 void (*_mutex_delete)(void *mutex);
110 int32_t (*_mutex_lock)(void *mutex);
111 int32_t (*_mutex_unlock)(void *mutex);
112 void *(*_queue_create)(uint32_t queue_len, uint32_t item_size);
113 void (*_queue_delete)(void *queue);
114 int32_t (*_queue_send)(void *queue, void *item, uint32_t block_time_ms);
115 int32_t (*_queue_send_from_isr)(void *queue, void *item, void *hptw);
116 int32_t (*_queue_recv)(void *queue, void *item, uint32_t block_time_ms);
117 int32_t (*_queue_recv_from_isr)(void *queue, void *item, void *hptw);
118 int32_t (*_task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param,
119 uint32_t prio, void *task_handle, uint32_t core_id);
120 void (*_task_delete)(void *task_handle);
121 bool (*_is_in_isr)(void);
122 int (*_cause_sw_intr_to_core)(int core_id, int intr_no);
123 void *(*_malloc)(uint32_t size);
124 void *(*_malloc_internal)(uint32_t size);
125 void (*_free)(void *p);
126 int32_t (*_read_efuse_mac)(uint8_t mac[6]);
127 void (*_srand)(unsigned int seed);
128 int (*_rand)(void);
129 uint32_t (*_btdm_lpcycles_2_us)(uint32_t cycles);
130 uint32_t (*_btdm_us_2_lpcycles)(uint32_t us);
131 bool (*_btdm_sleep_check_duration)(uint32_t *slot_cnt);
132 void (*_btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
133 void (*_btdm_sleep_enter_phase2)(void);
134 void (*_btdm_sleep_exit_phase1)(void); /* called from ISR */
135 void (*_btdm_sleep_exit_phase2)(void); /* called from ISR */
136 void (*_btdm_sleep_exit_phase3)(void); /* called from task */
137 bool (*_coex_bt_wakeup_request)(void);
138 void (*_coex_bt_wakeup_request_end)(void);
139 int (*_coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
140 int (*_coex_bt_release)(uint32_t event);
141 int (*_coex_register_bt_cb)(coex_func_cb_t cb);
142 uint32_t (*_coex_bb_reset_lock)(void);
143 void (*_coex_bb_reset_unlock)(uint32_t restore);
144 int (* _coex_schm_register_btdm_callback)(void *callback);
145 void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
146 void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
147 uint32_t (* _coex_schm_interval_get)(void);
148 uint8_t (* _coex_schm_curr_period_get)(void);
149 void *(* _coex_schm_curr_phase_get)(void);
150 int (* _coex_wifi_channel_get)(uint8_t *primary, uint8_t *secondary);
151 int (* _coex_register_wifi_channel_change_callback)(void *cb);
152 void (*_set_isr_l3)(int n, void *f, void *arg);
153 void (*_interrupt_l3_disable)(void);
154 void (*_interrupt_l3_restore)(void);
155 void *(* _customer_queue_create)(uint32_t queue_len, uint32_t item_size);
156 int (* _coex_version_get)(unsigned int *major, unsigned int *minor, unsigned int *patch);
157 void (* _patch_apply)(void);
158 uint32_t _magic;
159 };
160
161 /* OSI */
162 extern int btdm_osi_funcs_register(void *osi_funcs);
163 /* Initialise and De-initialise */
164 extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
165 extern void btdm_controller_deinit(void);
166 extern int btdm_controller_enable(esp_bt_mode_t mode);
167 extern void btdm_controller_disable(void);
168 extern uint8_t btdm_controller_get_mode(void);
169 extern const char *btdm_controller_get_compile_version(void);
170 extern void btdm_rf_bb_init_phase2(void); /* shall be called after PHY/RF is enabled */
171 extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
172 /* Sleep */
173 extern void btdm_controller_enable_sleep(bool enable);
174 extern void btdm_controller_set_sleep_mode(uint8_t mode);
175 extern uint8_t btdm_controller_get_sleep_mode(void);
176 extern bool btdm_power_state_active(void);
177 extern void btdm_wakeup_request(void);
178 extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
179 /* Low Power Clock */
180 extern bool btdm_lpclk_select_src(uint32_t sel);
181 extern bool btdm_lpclk_set_div(uint32_t div);
182 /* VHCI */
183 extern bool API_vhci_host_check_send_available(void);
184 extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
185 extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
186 /* TX power */
187 extern int ble_txpwr_set(int power_type, int power_level);
188 extern int ble_txpwr_get(int power_type);
189 extern int bredr_txpwr_set(int min_power_level, int max_power_level);
190 extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
191 extern void bredr_sco_datapath_set(uint8_t data_path);
192 extern void btdm_controller_scan_duplicate_list_clear(void);
193 /* Coexistence */
194 extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
195 extern int coex_bt_release(uint32_t event);
196 extern int coex_register_bt_cb(coex_func_cb_t cb);
197 extern uint32_t coex_bb_reset_lock(void);
198 extern void coex_bb_reset_unlock(uint32_t restore);
199 extern int coex_schm_register_btdm_callback(void *callback);
200 extern void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
201 extern void coex_schm_status_bit_set(uint32_t type, uint32_t status);
202 extern uint32_t coex_schm_interval_get(void);
203 extern uint8_t coex_schm_curr_period_get(void);
204 extern void * coex_schm_curr_phase_get(void);
205 extern int coex_wifi_channel_get(uint8_t *primary, uint8_t *secondary);
206 extern void coex_ble_adv_priority_high_set(bool high);
207 /* Shutdown */
208 extern void esp_bt_controller_shutdown(void);
209 extern void sdk_config_set_bt_pll_track_enable(bool enable);
210 extern void sdk_config_set_uart_flow_ctrl_enable(bool enable);
211
212 extern char _data_start_btdm[];
213 extern char _data_end_btdm[];
214 extern uint32_t _data_start_btdm_rom;
215 extern uint32_t _data_end_btdm_rom;
216
217 extern void config_bt_funcs_reset(void);
218 extern void config_ble_funcs_reset(void);
219 extern void config_btdm_funcs_reset(void);
220
221 static void task_yield_from_isr(void);
222 static void *semphr_create_wrapper(uint32_t max, uint32_t init);
223 static void semphr_delete_wrapper(void *semphr);
224 static int32_t semphr_take_from_isr_wrapper(void *semphr, void *hptw);
225 static int32_t semphr_give_from_isr_wrapper(void *semphr, void *hptw);
226 static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
227 static int32_t semphr_give_wrapper(void *semphr);
228 static void *mutex_create_wrapper(void);
229 static void mutex_delete_wrapper(void *mutex);
230 static int32_t mutex_lock_wrapper(void *mutex);
231 static int32_t mutex_unlock_wrapper(void *mutex);
232 static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
233 static void queue_delete_wrapper(void *queue);
234 static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
235 static int32_t queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
236 static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
237 static int32_t queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
238 static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
239 static void task_delete_wrapper(void *task_handle);
240 static int cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
241 static void *malloc_internal_wrapper(size_t size);
242 static int32_t read_mac_wrapper(uint8_t mac[6]);
243 static void srand_wrapper(unsigned int seed);
244 static int rand_wrapper(void);
245 static uint32_t btdm_lpcycles_2_us(uint32_t cycles);
246 static uint32_t btdm_us_2_lpcycles(uint32_t us);
247 static bool btdm_sleep_check_duration(uint32_t *slot_cnt);
248 static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
249 static void btdm_sleep_enter_phase2_wrapper(void);
250 static void btdm_sleep_exit_phase3_wrapper(void);
251 static bool coex_bt_wakeup_request(void);
252 static void coex_bt_wakeup_request_end(void);
253 static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
254 static int coex_bt_release_wrapper(uint32_t event);
255 static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
256 static uint32_t coex_bb_reset_lock_wrapper(void);
257 static void coex_bb_reset_unlock_wrapper(uint32_t restore);
258 static int coex_schm_register_btdm_callback_wrapper(void *callback);
259 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
260 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
261 static uint32_t coex_schm_interval_get_wrapper(void);
262 static uint8_t coex_schm_curr_period_get_wrapper(void);
263 static void * coex_schm_curr_phase_get_wrapper(void);
264 static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary);
265 static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
266 static int coex_version_get_wrapper(unsigned int *major, unsigned int *minor, unsigned int *patch);
267 static void set_isr_wrapper(int32_t n, void *f, void *arg);
268 static void intr_on(unsigned int mask);
269 static void interrupt_l3_disable(void);
270 static void interrupt_l3_restore(void);
271 static void bt_controller_deinit_internal(void);
272 static void patch_apply(void);
273 static void esp_bt_free(void *mem);
274
275 /* Local variable definition
276 ***************************************************************************
277 */
278 /* OSI funcs */
279 static const struct osi_funcs_t osi_funcs_ro = {
280 ._version = OSI_VERSION,
281 ._set_isr = set_isr_wrapper,
282 ._ints_on = intr_on,
283 ._interrupt_disable = interrupt_l3_disable,
284 ._interrupt_restore = interrupt_l3_restore,
285 ._task_yield = task_yield_from_isr,
286 ._task_yield_from_isr = task_yield_from_isr,
287 ._semphr_create = semphr_create_wrapper,
288 ._semphr_delete = semphr_delete_wrapper,
289 ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
290 ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
291 ._semphr_take = semphr_take_wrapper,
292 ._semphr_give = semphr_give_wrapper,
293 ._mutex_create = mutex_create_wrapper,
294 ._mutex_delete = mutex_delete_wrapper,
295 ._mutex_lock = mutex_lock_wrapper,
296 ._mutex_unlock = mutex_unlock_wrapper,
297 ._queue_create = queue_create_wrapper,
298 ._queue_delete = queue_delete_wrapper,
299 ._queue_send = queue_send_wrapper,
300 ._queue_send_from_isr = queue_send_from_isr_wrapper,
301 ._queue_recv = queue_recv_wrapper,
302 ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
303 ._task_create = task_create_wrapper,
304 ._task_delete = task_delete_wrapper,
305 ._is_in_isr = k_is_in_isr,
306 ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
307 ._malloc = malloc_internal_wrapper,
308 ._malloc_internal = malloc_internal_wrapper,
309 ._free = esp_bt_free,
310 ._read_efuse_mac = read_mac_wrapper,
311 ._srand = srand_wrapper,
312 ._rand = rand_wrapper,
313 ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
314 ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
315 ._btdm_sleep_check_duration = btdm_sleep_check_duration,
316 ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
317 ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
318 ._btdm_sleep_exit_phase1 = NULL,
319 ._btdm_sleep_exit_phase2 = NULL,
320 ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
321 ._coex_bt_wakeup_request = coex_bt_wakeup_request,
322 ._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
323 ._coex_bt_request = coex_bt_request_wrapper,
324 ._coex_bt_release = coex_bt_release_wrapper,
325 ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
326 ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
327 ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
328 ._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
329 ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
330 ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
331 ._coex_schm_interval_get = coex_schm_interval_get_wrapper,
332 ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
333 ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
334 ._coex_wifi_channel_get = coex_wifi_channel_get_wrapper,
335 ._coex_register_wifi_channel_change_callback = coex_register_wifi_channel_change_callback_wrapper,
336 ._set_isr_l3 = set_isr_wrapper,
337 ._interrupt_l3_disable = interrupt_l3_disable,
338 ._interrupt_l3_restore = interrupt_l3_restore,
339 ._customer_queue_create = NULL,
340 ._coex_version_get = coex_version_get_wrapper,
341 ._patch_apply = patch_apply,
342 ._magic = OSI_MAGIC_VALUE,
343 };
344
345 /* the mode column will be modified by release function to indicate the available region */
346 static btdm_dram_available_region_t btdm_dram_available_region[] = {
347 /* following is .data */
348 { ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
349 /* following is memory which HW will use */
350 { ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
351 { ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
352 { ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
353 { ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END },
354 /* following is .bss */
355 { ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
356 { ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
357 };
358
359 static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
360
361 /* Static variable declare */
362 /* timestamp when PHY/RF was switched on */
363 static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
364 static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
365
366 static unsigned int global_int_lock;
367 static unsigned int global_nested_counter = 0;
368
369 /* BT library uses a single task */
370 K_THREAD_STACK_DEFINE(bt_stack, CONFIG_ESP32_BT_CONTROLLER_STACK_SIZE);
371 static struct k_thread bt_task_handle;
372
373 /* measured average low power clock period in micro seconds */
374 static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
375 /* number of fractional bit for btdm_lpcycle_us */
376 static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
377
378 #if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
379 // used low power clock
380 static DRAM_ATTR uint8_t btdm_lpclk_sel;
381 #endif /* #ifdef CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG */
382
383 static DRAM_ATTR struct k_sem *s_wakeup_req_sem = NULL;
384
esp_bt_power_domain_on(void)385 static inline void esp_bt_power_domain_on(void)
386 {
387 /* Bluetooth module power up */
388 esp_wifi_bt_power_domain_on();
389 }
390
esp_bt_power_domain_off(void)391 static inline void esp_bt_power_domain_off(void)
392 {
393 /* Bluetooth module power down */
394 esp_wifi_bt_power_domain_off();
395 }
396
btdm_check_and_init_bb(void)397 static inline void btdm_check_and_init_bb(void)
398 {
399 /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
400 int64_t latest_ts = esp_phy_rf_get_on_ts();
401
402 if (latest_ts != s_time_phy_rf_just_enabled ||
403 s_time_phy_rf_just_enabled == 0) {
404 btdm_rf_bb_init_phase2();
405 s_time_phy_rf_just_enabled = latest_ts;
406 }
407 }
408
interrupt_l3_disable(void)409 static void IRAM_ATTR interrupt_l3_disable(void)
410 {
411 if (global_nested_counter == 0) {
412 global_int_lock = irq_lock();
413 }
414
415 if (global_nested_counter < 0xFFFFFFFF) {
416 global_nested_counter++;
417 }
418 }
419
interrupt_l3_restore(void)420 static void IRAM_ATTR interrupt_l3_restore(void)
421 {
422 if (global_nested_counter > 0) {
423 global_nested_counter--;
424 }
425
426 if (global_nested_counter == 0) {
427 irq_unlock(global_int_lock);
428 }
429 }
430
set_isr_wrapper(int32_t n,void * f,void * arg)431 static void set_isr_wrapper(int32_t n, void *f, void *arg)
432 {
433 irq_disable(n);
434 irq_connect_dynamic(n, Xthal_intlevel[n], f, arg, 0);
435 }
436
intr_on(unsigned int mask)437 static void intr_on(unsigned int mask)
438 {
439 unsigned int pos = 0, i = 1;
440
441 while (!(i & mask)) {
442 i = i << 1;
443 ++pos;
444 }
445
446 irq_enable(pos);
447 }
448
task_yield_from_isr(void)449 static void IRAM_ATTR task_yield_from_isr(void)
450 {
451 k_yield();
452 }
453
semphr_create_wrapper(uint32_t max,uint32_t init)454 static void *semphr_create_wrapper(uint32_t max, uint32_t init)
455 {
456 struct k_sem *sem = (struct k_sem *) esp_bt_malloc_func(sizeof(struct k_sem));
457
458 if (sem == NULL) {
459 LOG_ERR("semaphore malloc failed");
460 return NULL;
461 }
462
463 k_sem_init(sem, init, max);
464 return sem;
465 }
466
semphr_delete_wrapper(void * semphr)467 static void semphr_delete_wrapper(void *semphr)
468 {
469 esp_bt_free(semphr);
470 }
471
semphr_take_from_isr_wrapper(void * semphr,void * hptw)472 static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
473 {
474 int *hpt = (int *) hptw;
475 int ret = k_sem_take((struct k_sem *)semphr, K_NO_WAIT);
476
477 *hpt = 0;
478
479 if (ret == 0) {
480 return 1;
481 }
482
483 return 0;
484 }
485
semphr_give_from_isr_wrapper(void * semphr,void * hptw)486 static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
487 {
488 int *hpt = (int *) hptw;
489
490 k_sem_give((struct k_sem *) semphr);
491
492 *hpt = 0;
493 return 1;
494 }
495
semphr_take_wrapper(void * semphr,uint32_t block_time_ms)496 static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
497 {
498 int ret = 0;
499
500 if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
501 ret = k_sem_take((struct k_sem *)semphr, K_FOREVER);
502 } else {
503 ret = k_sem_take((struct k_sem *)semphr, K_MSEC(block_time_ms));
504 }
505
506 if (ret == 0) {
507 return 1;
508 }
509
510 return 0;
511 }
512
semphr_give_wrapper(void * semphr)513 static int32_t semphr_give_wrapper(void *semphr)
514 {
515 k_sem_give((struct k_sem *) semphr);
516 return 1;
517 }
518
mutex_create_wrapper(void)519 static void *mutex_create_wrapper(void)
520 {
521 struct k_mutex *my_mutex = (struct k_mutex *) esp_bt_malloc_func(sizeof(struct k_mutex));
522
523 if (my_mutex == NULL) {
524 LOG_ERR("mutex malloc failed");
525 return NULL;
526 }
527
528 k_mutex_init(my_mutex);
529
530 return my_mutex;
531 }
532
mutex_delete_wrapper(void * mutex)533 static void mutex_delete_wrapper(void *mutex)
534 {
535 esp_bt_free(mutex);
536 }
537
mutex_lock_wrapper(void * mutex)538 static int32_t mutex_lock_wrapper(void *mutex)
539 {
540 struct k_mutex *my_mutex = (struct k_mutex *) mutex;
541
542 k_mutex_lock(my_mutex, K_FOREVER);
543 return 0;
544 }
545
mutex_unlock_wrapper(void * mutex)546 static int32_t mutex_unlock_wrapper(void *mutex)
547 {
548 struct k_mutex *my_mutex = (struct k_mutex *) mutex;
549
550 k_mutex_unlock(my_mutex);
551 return 0;
552 }
553
queue_create_wrapper(uint32_t queue_len,uint32_t item_size)554 static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
555 {
556 struct bt_queue_t *queue = esp_bt_malloc_func(sizeof(struct bt_queue_t));
557
558 if (queue == NULL) {
559 LOG_ERR("queue malloc failed");
560 return NULL;
561 }
562
563 queue->pool = (uint8_t *)esp_bt_malloc_func(queue_len * item_size * sizeof(uint8_t));
564
565 if (queue->pool == NULL) {
566 LOG_ERR("queue pool malloc failed");
567 esp_bt_free(queue);
568 return NULL;
569 }
570
571 k_msgq_init(&queue->queue, queue->pool, item_size, queue_len);
572 return queue;
573 }
574
queue_delete_wrapper(void * queue)575 static void queue_delete_wrapper(void *queue)
576 {
577 struct bt_queue_t *q = (struct bt_queue_t *) queue;
578
579 if (q != NULL) {
580 esp_bt_free(q->pool);
581 esp_bt_free(q);
582 }
583 }
584
queue_send_wrapper(void * queue,void * item,uint32_t block_time_ms)585 static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
586 {
587 int res = 0;
588
589 if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
590 res = k_msgq_put(queue, item, K_FOREVER);
591 } else {
592 res = k_msgq_put(queue, item, K_MSEC(block_time_ms));
593 }
594
595 if (res == 0) {
596 return 1;
597 }
598
599 return 0;
600 }
601
queue_send_from_isr_wrapper(void * queue,void * item,void * hptw)602 static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
603 {
604 int *hpt = (int *) hptw;
605 int ret = k_msgq_put(queue, item, K_NO_WAIT);
606
607 *hpt = 0;
608
609 if (ret == 0) {
610 return 1;
611 }
612
613 return 0;
614 }
615
queue_recv_wrapper(void * queue,void * item,uint32_t block_time_ms)616 static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
617 {
618 int ret = 0;
619
620 if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
621 ret = k_msgq_get(queue, item, K_FOREVER);
622 } else {
623 ret = k_msgq_get(queue, item, K_MSEC(block_time_ms));
624 }
625
626 if (ret == 0) {
627 return 1;
628 }
629
630 return 0;
631 }
632
queue_recv_from_isr_wrapper(void * queue,void * item,void * hptw)633 static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
634 {
635 int *hpt = (int *) hptw;
636 int ret = k_msgq_get(queue, item, K_NO_WAIT);
637
638 *hpt = 0;
639
640 if (ret == 0) {
641 return 1;
642 }
643
644 return 0;
645 }
646
task_create_wrapper(void * task_func,const char * name,uint32_t stack_depth,void * param,uint32_t prio,void * task_handle,uint32_t core_id)647 static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
648 {
649 k_tid_t tid = k_thread_create(&bt_task_handle, bt_stack, stack_depth,
650 (k_thread_entry_t)task_func, param, NULL, NULL,
651 K_PRIO_COOP(prio), K_INHERIT_PERMS, K_NO_WAIT);
652
653 k_thread_name_set(tid, name);
654
655 *(int32_t *)task_handle = (int32_t) tid;
656
657 return 1;
658 }
659
task_delete_wrapper(void * task_handle)660 static void task_delete_wrapper(void *task_handle)
661 {
662 if (task_handle != NULL) {
663 k_thread_abort((k_tid_t)task_handle);
664 }
665
666 k_object_release(&bt_task_handle);
667 }
668
cause_sw_intr_to_core_wrapper(int core_id,int intr_no)669 static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
670 {
671 esp_err_t err = ESP_OK;
672
673 #ifndef CONFIG_SMP
674 XTHAL_SET_INTSET((1 << intr_no));
675 #else
676 /* this should be handled once SMP support gets in place */
677 err = ESP_ERR_NOT_SUPPORTED;
678 #endif
679
680 return err;
681 }
682
malloc_internal_wrapper(size_t size)683 static void *malloc_internal_wrapper(size_t size)
684 {
685 return esp_bt_malloc_func(sizeof(uint8_t) * size);
686 }
687
read_mac_wrapper(uint8_t mac[6])688 static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
689 {
690 return esp_read_mac(mac, ESP_MAC_BT);
691 }
692
rand_wrapper(void)693 static int IRAM_ATTR rand_wrapper(void)
694 {
695 return (int)esp_random();
696 }
697
srand_wrapper(unsigned int seed)698 static void IRAM_ATTR srand_wrapper(unsigned int seed)
699 {
700 /* empty function */
701 ARG_UNUSED(seed);
702 }
703
btdm_lpcycles_2_us(uint32_t cycles)704 static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
705 {
706 /* The number of lp cycles should not lead to overflow. Thrs: 100s */
707 /* clock measurement is conducted */
708 uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
709
710 us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
711 return (uint32_t)us;
712 }
713
714 /*
715 * @brief Converts a duration in slots into a number of low power clock cycles.
716 */
btdm_us_2_lpcycles(uint32_t us)717 static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
718 {
719 /* The number of sleep duration(us) should not lead to overflow. Thrs: 100s */
720 /* Compute the sleep duration in us to low power clock cycles, with calibration result applied */
721 /* clock measurement is conducted */
722 uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
723
724 return (uint32_t)cycles;
725 }
726
btdm_sleep_check_duration(uint32_t * slot_cnt)727 static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
728 {
729 if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
730 return false;
731 }
732 /* wake up in advance considering the delay in enabling PHY/RF */
733 *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
734 return true;
735 }
736
btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)737 static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
738 {
739 ARG_UNUSED(lpcycles);
740 }
741
btdm_sleep_enter_phase2_wrapper(void)742 static void btdm_sleep_enter_phase2_wrapper(void)
743 {
744 if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
745 esp_phy_disable(PHY_MODEM_BT);
746 } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
747 esp_phy_disable(PHY_MODEM_BT);
748 /* pause bluetooth baseband */
749 periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
750 }
751 }
752
btdm_sleep_exit_phase3_wrapper(void)753 static void btdm_sleep_exit_phase3_wrapper(void)
754 {
755 if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
756 esp_phy_enable(PHY_MODEM_BT);
757 btdm_check_and_init_bb();
758 } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
759 /* resume bluetooth baseband */
760 periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
761 esp_phy_enable(PHY_MODEM_BT);
762 }
763 }
764
765 #define BTDM_ASYNC_WAKEUP_REQ_HCI 0
766 #define BTDM_ASYNC_WAKEUP_REQ_COEX 1
767 #define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
768 #define BTDM_ASYNC_WAKEUP_REQMAX 3
769
btdm_wakeup_request_callback(void * arg)770 static void btdm_wakeup_request_callback(void *arg)
771 {
772 (void)(arg);
773
774 btdm_wakeup_request();
775
776 semphr_give_wrapper(s_wakeup_req_sem);
777 }
778
async_wakeup_request(int event)779 static bool async_wakeup_request(int event)
780 {
781 bool do_wakeup_request = false;
782
783 switch (event) {
784 case BTDM_ASYNC_WAKEUP_REQ_HCI:
785 btdm_in_wakeup_requesting_set(true);
786 /* NO break */
787 case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
788 if (!btdm_power_state_active()) {
789 do_wakeup_request = true;
790
791 btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
792 semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
793 }
794 break;
795 case BTDM_ASYNC_WAKEUP_REQ_COEX:
796 if (!btdm_power_state_active()) {
797 do_wakeup_request = true;
798 btdm_wakeup_request();
799 }
800 break;
801 default:
802 return false;
803 }
804
805 return do_wakeup_request;
806 }
807
async_wakeup_request_end(int event)808 static void async_wakeup_request_end(int event)
809 {
810 bool request_lock = false;
811
812 switch (event) {
813 case BTDM_ASYNC_WAKEUP_REQ_HCI:
814 request_lock = true;
815 break;
816 case BTDM_ASYNC_WAKEUP_REQ_COEX:
817 case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
818 request_lock = false;
819 break;
820 default:
821 return;
822 }
823
824 if (request_lock) {
825 btdm_in_wakeup_requesting_set(false);
826 }
827
828 return;
829 }
830
coex_bt_wakeup_request(void)831 static bool coex_bt_wakeup_request(void)
832 {
833 return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
834 }
835
coex_bt_wakeup_request_end(void)836 static void coex_bt_wakeup_request_end(void)
837 {
838 async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
839 return;
840 }
841
coex_bt_request_wrapper(uint32_t event,uint32_t latency,uint32_t duration)842 static int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
843 {
844 #if CONFIG_SW_COEXIST_ENABLE
845 return coex_bt_request(event, latency, duration);
846 #else
847 return 0;
848 #endif
849 }
850
coex_bt_release_wrapper(uint32_t event)851 static int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
852 {
853 #if CONFIG_SW_COEXIST_ENABLE
854 return coex_bt_release(event);
855 #else
856 return 0;
857 #endif
858 }
859
coex_register_bt_cb_wrapper(coex_func_cb_t cb)860 static int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
861 {
862 #if CONFIG_SW_COEXIST_ENABLE
863 return coex_register_bt_cb(cb);
864 #else
865 return 0;
866 #endif
867 }
868
coex_bb_reset_lock_wrapper(void)869 static uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
870 {
871 #if CONFIG_SW_COEXIST_ENABLE
872 return coex_bb_reset_lock();
873 #else
874 return 0;
875 #endif
876 }
877
coex_bb_reset_unlock_wrapper(uint32_t restore)878 static void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
879 {
880 #if CONFIG_SW_COEXIST_ENABLE
881 coex_bb_reset_unlock(restore);
882 #endif
883 }
884
coex_schm_register_btdm_callback_wrapper(void * callback)885 static int coex_schm_register_btdm_callback_wrapper(void *callback)
886 {
887 #if CONFIG_SW_COEXIST_ENABLE
888 return coex_schm_register_callback(COEX_SCHM_CALLBACK_TYPE_BT, callback);
889 #else
890 return 0;
891 #endif
892 }
893
coex_schm_status_bit_clear_wrapper(uint32_t type,uint32_t status)894 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
895 {
896 #if CONFIG_SW_COEXIST_ENABLE
897 coex_schm_status_bit_clear(type, status);
898 #endif
899 }
900
coex_schm_status_bit_set_wrapper(uint32_t type,uint32_t status)901 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
902 {
903 #if CONFIG_SW_COEXIST_ENABLE
904 coex_schm_status_bit_set(type, status);
905 #endif
906 }
907
coex_schm_interval_get_wrapper(void)908 static uint32_t coex_schm_interval_get_wrapper(void)
909 {
910 #if CONFIG_SW_COEXIST_ENABLE
911 return coex_schm_interval_get();
912 #else
913 return 0;
914 #endif
915 }
916
coex_schm_curr_period_get_wrapper(void)917 static uint8_t coex_schm_curr_period_get_wrapper(void)
918 {
919 #if CONFIG_SW_COEXIST_ENABLE
920 return coex_schm_curr_period_get();
921 #else
922 return 1;
923 #endif
924 }
925
coex_schm_curr_phase_get_wrapper(void)926 static void * coex_schm_curr_phase_get_wrapper(void)
927 {
928 #if CONFIG_SW_COEXIST_ENABLE
929 return coex_schm_curr_phase_get();
930 #else
931 return NULL;
932 #endif
933 }
934
coex_wifi_channel_get_wrapper(uint8_t * primary,uint8_t * secondary)935 static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary)
936 {
937 #if CONFIG_SW_COEXIST_ENABLE
938 return coex_wifi_channel_get(primary, secondary);
939 #else
940 return -1;
941 #endif
942 }
943
coex_register_wifi_channel_change_callback_wrapper(void * cb)944 static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
945 {
946 #if CONFIG_SW_COEXIST_ENABLE
947 return coex_register_wifi_channel_change_callback(cb);
948 #else
949 return -1;
950 #endif
951 }
952
coex_version_get_wrapper(unsigned int * major,unsigned int * minor,unsigned int * patch)953 static int coex_version_get_wrapper(unsigned int *major, unsigned int *minor, unsigned int *patch)
954 {
955 #if CONFIG_SW_COEXIST_ENABLE
956 coex_version_t version;
957 coex_version_get_value(&version);
958 *major = (unsigned int)version.major;
959 *minor = (unsigned int)version.minor;
960 *patch = (unsigned int)version.patch;
961 return 0;
962 #endif
963 return -1;
964 }
965
esp_vhci_host_check_send_available(void)966 bool esp_vhci_host_check_send_available(void)
967 {
968 return API_vhci_host_check_send_available();
969 }
970
esp_vhci_host_send_packet(uint8_t * data,uint16_t len)971 void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
972 {
973 async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
974
975 API_vhci_host_send_packet(data, len);
976
977 async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
978 }
979
esp_vhci_host_register_callback(const esp_vhci_host_callback_t * callback)980 esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
981 {
982 return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
983 }
984
btdm_config_mask_load(void)985 static uint32_t btdm_config_mask_load(void)
986 {
987 uint32_t mask = 0x0;
988
989 #if CONFIG_BTDM_CTRL_PINNED_TO_CORE == 1
990 mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
991 #endif
992 #if CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED
993 mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
994 #endif /* CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED */
995 mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
996
997 mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
998
999 return mask;
1000 }
1001
btdm_controller_mem_init(void)1002 static void btdm_controller_mem_init(void)
1003 {
1004 /* initialise .data section */
1005 memcpy(_data_start_btdm, (void *)_data_start_btdm_rom, _data_end_btdm - _data_start_btdm);
1006 LOG_DBG(".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, (uint32_t)_data_start_btdm_rom);
1007
1008 /* initial em, .bss section */
1009 for (int i = 1; i < sizeof(btdm_dram_available_region) / sizeof(btdm_dram_available_region_t); i++) {
1010 if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
1011 memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
1012 LOG_DBG(".bss initialise [0x%08x] - [0x%08x]", (uint32_t)btdm_dram_available_region[i].start, (uint32_t)btdm_dram_available_region[i].end);
1013 }
1014 }
1015 }
1016
esp_bt_controller_mem_release(esp_bt_mode_t mode)1017 esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
1018 {
1019 /* not implemented */
1020 return ESP_OK;
1021 }
1022
esp_bt_mem_release(esp_bt_mode_t mode)1023 esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
1024 {
1025 /* not implemented */
1026 return ESP_OK;
1027 }
1028
esp_bt_controller_init(esp_bt_controller_config_t * cfg)1029 esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
1030 {
1031 esp_err_t err;
1032 uint32_t btdm_cfg_mask = 0;
1033
1034 osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
1035 if (osi_funcs_p == NULL) {
1036 return ESP_ERR_NO_MEM;
1037 }
1038
1039 memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
1040 if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
1041 return ESP_ERR_INVALID_ARG;
1042 }
1043
1044 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
1045 return ESP_ERR_INVALID_STATE;
1046 }
1047
1048 if (cfg == NULL) {
1049 return ESP_ERR_INVALID_ARG;
1050 }
1051
1052 if (cfg->controller_task_prio != CONFIG_ESP32_BT_CONTROLLER_TASK_PRIO
1053 || cfg->controller_task_stack_size < CONFIG_ESP32_BT_CONTROLLER_STACK_SIZE) {
1054 return ESP_ERR_INVALID_ARG;
1055 }
1056
1057 /* overwrite some parameters */
1058 cfg->bt_max_sync_conn = 0;
1059 cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
1060
1061 if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
1062 || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
1063 || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
1064 return ESP_ERR_INVALID_ARG;
1065 }
1066
1067 LOG_INF("BT controller compile version [%s]", btdm_controller_get_compile_version());
1068
1069 s_wakeup_req_sem = semphr_create_wrapper(1, 0);
1070 if (s_wakeup_req_sem == NULL) {
1071 err = ESP_ERR_NO_MEM;
1072 goto error;
1073 }
1074
1075 esp_phy_modem_init();
1076
1077 esp_bt_power_domain_on();
1078
1079 btdm_controller_mem_init();
1080
1081 periph_module_enable(PERIPH_BT_MODULE);
1082 periph_module_reset(PERIPH_BT_MODULE);
1083
1084 /* set default sleep clock cycle and its fractional bits */
1085 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1086 btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
1087
1088 #if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
1089
1090 btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
1091 #if CONFIG_BTDM_LPCLK_SEL_EXT_32K_XTAL
1092 /* check whether or not EXT_CRYS is working */
1093 if (rtc_clk_slow_freq_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
1094 btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // set default value
1095 } else {
1096 LOG_WRN("32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
1097 "light sleep mode will not be able to apply when bluetooth is enabled");
1098 btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
1099 }
1100 #else
1101 btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
1102 #endif
1103
1104 bool select_src_ret __attribute__((unused));
1105 bool set_div_ret __attribute__((unused));
1106 if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
1107 select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
1108 set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 / MHZ(1) - 1);
1109 assert(select_src_ret && set_div_ret);
1110 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1111 btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
1112 } else { /* btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K */
1113 select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
1114 set_div_ret = btdm_lpclk_set_div(0);
1115 assert(select_src_ret && set_div_ret);
1116 btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
1117 btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
1118 (1000000 >> (15 - RTC_CLK_CAL_FRACT));
1119 assert(btdm_lpcycle_us != 0);
1120 }
1121 btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
1122
1123 #elif CONFIG_BTDM_MODEM_SLEEP_MODE_EVED
1124 btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
1125 #else
1126 btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
1127 #endif
1128
1129 sdk_config_set_uart_flow_ctrl_enable(false);
1130
1131 #if CONFIG_SW_COEXIST_ENABLE
1132 coex_init();
1133 #endif
1134
1135 btdm_cfg_mask = btdm_config_mask_load();
1136
1137 if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
1138 err = ESP_ERR_NO_MEM;
1139 goto error;
1140 }
1141
1142 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
1143
1144 return ESP_OK;
1145
1146 error:
1147
1148 bt_controller_deinit_internal();
1149
1150 return err;
1151 }
1152
esp_bt_controller_deinit(void)1153 esp_err_t esp_bt_controller_deinit(void)
1154 {
1155 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
1156 return ESP_ERR_INVALID_STATE;
1157 }
1158
1159 btdm_controller_deinit();
1160
1161 bt_controller_deinit_internal();
1162
1163 return ESP_OK;
1164 }
1165
bt_controller_deinit_internal(void)1166 static void bt_controller_deinit_internal(void)
1167 {
1168 periph_module_disable(PERIPH_BT_MODULE);
1169
1170 if (s_wakeup_req_sem) {
1171 semphr_delete_wrapper(s_wakeup_req_sem);
1172 s_wakeup_req_sem = NULL;
1173 }
1174
1175 if (osi_funcs_p) {
1176 esp_bt_free(osi_funcs_p);
1177 osi_funcs_p = NULL;
1178 }
1179
1180 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
1181
1182 btdm_lpcycle_us = 0;
1183 btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
1184
1185 esp_bt_power_domain_off();
1186
1187 esp_phy_modem_deinit();
1188 }
1189
bt_shutdown(void)1190 static void bt_shutdown(void)
1191 {
1192 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1193 return;
1194 }
1195
1196 esp_bt_controller_shutdown();
1197 esp_phy_disable(PHY_MODEM_BT);
1198 return;
1199 }
1200
patch_apply(void)1201 static void patch_apply(void)
1202 {
1203 config_btdm_funcs_reset();
1204
1205 #ifndef CONFIG_BTDM_CTRL_MODE_BLE_ONLY
1206 config_bt_funcs_reset();
1207 #endif
1208
1209 #ifndef CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY
1210 config_ble_funcs_reset();
1211 #endif
1212
1213 #ifdef CONFIG_BTDM_BLE_VS_QA_SUPPORT
1214 config_ble_vs_qa_funcs_reset();
1215 #endif
1216
1217 }
1218
esp_bt_controller_enable(esp_bt_mode_t mode)1219 esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
1220 {
1221 int ret;
1222
1223 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
1224 return ESP_ERR_INVALID_STATE;
1225 }
1226
1227 /* As the history reason, mode should be equal to the mode which set in esp_bt_controller_init() */
1228 if (mode != btdm_controller_get_mode()) {
1229 return ESP_ERR_INVALID_ARG;
1230 }
1231
1232 esp_phy_enable(PHY_MODEM_BT);
1233
1234 #if CONFIG_SW_COEXIST_ENABLE
1235 coex_enable();
1236 #endif
1237
1238 if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
1239 btdm_controller_enable_sleep(true);
1240 }
1241
1242 sdk_config_set_bt_pll_track_enable(true);
1243
1244 /* inititalize bluetooth baseband */
1245 btdm_check_and_init_bb();
1246
1247 ret = btdm_controller_enable(mode);
1248 if (ret != 0) {
1249 #if CONFIG_SW_COEXIST_ENABLE
1250 coex_disable();
1251 #endif
1252 esp_phy_disable(PHY_MODEM_BT);
1253 return ESP_ERR_INVALID_STATE;
1254 }
1255
1256 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
1257
1258 /* set default TX power level */
1259 esp_ble_tx_power_set(ESP_BLE_PWR_TYPE_DEFAULT, ESP32_RADIO_TXP_DEFAULT);
1260
1261 return ESP_OK;
1262 }
1263
esp_bt_controller_disable(void)1264 esp_err_t esp_bt_controller_disable(void)
1265 {
1266 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1267 return ESP_ERR_INVALID_STATE;
1268 }
1269
1270 /* disable modem sleep and wake up from sleep mode */
1271 if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
1272 btdm_controller_enable_sleep(false);
1273 async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
1274 while (!btdm_power_state_active()) {
1275 esp_rom_delay_us(1000);
1276 }
1277 }
1278
1279 btdm_controller_disable();
1280
1281 #if CONFIG_SW_COEXIST_ENABLE
1282 coex_disable();
1283 #endif
1284
1285 esp_phy_disable(PHY_MODEM_BT);
1286 btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
1287 bt_shutdown();
1288
1289 return ESP_OK;
1290 }
1291
esp_bt_controller_get_status(void)1292 esp_bt_controller_status_t esp_bt_controller_get_status(void)
1293 {
1294 return btdm_controller_status;
1295 }
1296
1297 /* extra functions */
esp_ble_tx_power_set(esp_ble_power_type_t power_type,esp_power_level_t power_level)1298 esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
1299 {
1300 if (ble_txpwr_set(power_type, power_level) != 0) {
1301 return ESP_ERR_INVALID_ARG;
1302 }
1303
1304 return ESP_OK;
1305 }
1306
esp_ble_tx_power_get(esp_ble_power_type_t power_type)1307 esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
1308 {
1309 return (esp_power_level_t)ble_txpwr_get(power_type);
1310 }
1311
esp_bredr_tx_power_set(esp_power_level_t min_power_level,esp_power_level_t max_power_level)1312 esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
1313 {
1314 esp_err_t err;
1315 int ret;
1316
1317 ret = bredr_txpwr_set(min_power_level, max_power_level);
1318
1319 if (ret == 0) {
1320 err = ESP_OK;
1321 } else if (ret == -1) {
1322 err = ESP_ERR_INVALID_ARG;
1323 } else {
1324 err = ESP_ERR_INVALID_STATE;
1325 }
1326
1327 return err;
1328 }
1329
esp_bredr_tx_power_get(esp_power_level_t * min_power_level,esp_power_level_t * max_power_level)1330 esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
1331 {
1332 if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
1333 return ESP_ERR_INVALID_ARG;
1334 }
1335
1336 return ESP_OK;
1337 }
1338
esp_bt_sleep_enable(void)1339 esp_err_t esp_bt_sleep_enable(void)
1340 {
1341 esp_err_t status;
1342
1343 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1344 return ESP_ERR_INVALID_STATE;
1345 }
1346 if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
1347 btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
1348 btdm_controller_enable_sleep(true);
1349 status = ESP_OK;
1350 } else {
1351 status = ESP_ERR_NOT_SUPPORTED;
1352 }
1353
1354 return status;
1355 }
1356
esp_bt_sleep_disable(void)1357 esp_err_t esp_bt_sleep_disable(void)
1358 {
1359 esp_err_t status;
1360
1361 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1362 return ESP_ERR_INVALID_STATE;
1363 }
1364 if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
1365 btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
1366 btdm_controller_enable_sleep(false);
1367 status = ESP_OK;
1368 } else {
1369 status = ESP_ERR_NOT_SUPPORTED;
1370 }
1371
1372 return status;
1373 }
1374
esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)1375 esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
1376 {
1377 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1378 return ESP_ERR_INVALID_STATE;
1379 }
1380 bredr_sco_datapath_set(data_path);
1381 return ESP_OK;
1382 }
1383
esp_ble_scan_dupilcate_list_flush(void)1384 esp_err_t esp_ble_scan_dupilcate_list_flush(void)
1385 {
1386 if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
1387 return ESP_ERR_INVALID_STATE;
1388 }
1389 btdm_controller_scan_duplicate_list_clear();
1390 return ESP_OK;
1391 }
1392
esp_bt_free(void * mem)1393 static void esp_bt_free(void *mem)
1394 {
1395 esp_bt_free_func(mem);
1396 }
1397
