Searched refs:TIMG_RTC_CALI_RDY (Results 1 – 14 of 14) sorted by relevance
/hal_espressif-latest/components/esp_hw_support/port/esp32/ |
D | rtc_time.c | 88 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) && in rtc_clk_cal_internal() 165 REG_CLR_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY); in rtc_clk_wait_for_slow_cycle() 174 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_wait_for_slow_cycle()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c2/ |
D | rtc_time.c | 70 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal() 101 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c3/ |
D | rtc_time.c | 74 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal() 105 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
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/hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
D | rtc_time.c | 72 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal() 103 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c6/ |
D | rtc_time.c | 120 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal() 151 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
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/hal_espressif-latest/components/esp_hw_support/port/esp32h2/ |
D | rtc_time.c | 120 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal() 151 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
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/hal_espressif-latest/components/esp_hw_support/port/esp32s2/ |
D | rtc_time.c | 44 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal_oneoff() 75 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal_oneoff()
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/hal_espressif-latest/components/soc/esp32c6/include/soc/ |
D | timer_group_reg.h | 401 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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/hal_espressif-latest/components/soc/esp32c2/include/soc/ |
D | timer_group_reg.h | 398 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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/hal_espressif-latest/components/soc/esp32c3/include/soc/ |
D | timer_group_reg.h | 398 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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/hal_espressif-latest/components/soc/esp32h2/include/soc/ |
D | timer_group_reg.h | 401 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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/hal_espressif-latest/components/soc/esp32s3/include/soc/ |
D | timer_group_reg.h | 509 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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/hal_espressif-latest/components/soc/esp32/include/soc/ |
D | timer_group_reg.h | 390 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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/hal_espressif-latest/components/soc/esp32s2/include/soc/ |
D | timer_group_reg.h | 601 #define TIMG_RTC_CALI_RDY (BIT(15)) macro
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