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Searched refs:TIMG_RTCCALICFG_REG (Results 1 – 14 of 14) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_time.c38 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING)) { in rtc_clk_cal_internal_oneoff()
44 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal_oneoff()
49 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal_oneoff()
50 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal_oneoff()
51 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal_oneoff()
68 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal_oneoff()
69 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal_oneoff()
75 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal_oneoff()
98 in_calibration_clk = REG_GET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL); in rtc_clk_cal_internal_cycling()
99 uint32_t cali_slowclk_cycles = REG_GET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX); in rtc_clk_cal_internal_cycling()
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/hal_espressif-latest/components/esp_hw_support/port/esp32/
Drtc_time.c51 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal()
52 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal()
53 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal()
79 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
80 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
88 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) && in rtc_clk_cal_internal()
164 REG_CLR_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING | TIMG_RTC_CALI_START); in rtc_clk_wait_for_slow_cycle()
165 REG_CLR_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY); in rtc_clk_wait_for_slow_cycle()
166 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, RTC_CAL_RTC_MUX); in rtc_clk_wait_for_slow_cycle()
170 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, 0); in rtc_clk_wait_for_slow_cycle()
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/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_time.c64 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING)) { in rtc_clk_cal_internal()
70 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal()
75 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal()
76 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal()
77 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal()
94 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
95 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
101 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
110 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_time.c68 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING)) { in rtc_clk_cal_internal()
74 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal()
79 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal()
80 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal()
81 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal()
98 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
99 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
105 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
114 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Drtc_time.c66 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING)) { in rtc_clk_cal_internal()
72 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal()
77 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cal_clk); in rtc_clk_cal_internal()
78 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal()
79 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal()
96 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
97 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
103 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
112 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
Drtc_time.c114 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING)) { in rtc_clk_cal_internal()
120 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal()
125 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cali_clk_sel); in rtc_clk_cal_internal()
126 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal()
127 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal()
144 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
145 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
151 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
169 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/
Drtc_time.c114 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING)) { in rtc_clk_cal_internal()
120 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) in rtc_clk_cal_internal()
125 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_CLK_SEL, cali_clk_sel); in rtc_clk_cal_internal()
126 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING); in rtc_clk_cal_internal()
127 REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, slowclk_cycles); in rtc_clk_cal_internal()
144 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
145 SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
151 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_cal_internal()
169 CLEAR_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START); in rtc_clk_cal_internal()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dtimer_group_reg.h383 #define TIMG_RTCCALICFG_REG(i) (REG_TIMG_BASE(i) + 0x68) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dtimer_group_reg.h380 #define TIMG_RTCCALICFG_REG(i) (DR_REG_TIMG_BASE(i) + 0x68) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dtimer_group_reg.h380 #define TIMG_RTCCALICFG_REG(i) (DR_REG_TIMG_BASE(i) + 0x68) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dtimer_group_reg.h383 #define TIMG_RTCCALICFG_REG(i) (REG_TIMG_BASE(i) + 0x68) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dtimer_group_reg.h491 #define TIMG_RTCCALICFG_REG(i) (REG_TIMG_BASE(i) + 0x68) macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Dtimer_group_reg.h375 #define TIMG_RTCCALICFG_REG(i) (REG_TIMG_BASE(i) + 0x0068) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dtimer_group_reg.h583 #define TIMG_RTCCALICFG_REG(i) (DR_REG_TIMG_BASE(i) + 0x68) macro