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Searched refs:TIMG_RTCCALICFG2_REG (Results 1 – 12 of 12) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_time.c69 REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, 1); in rtc_clk_cal_internal()
71 && !GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)); in rtc_clk_cal_internal()
83 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_X32K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
86 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_8MD256_CAL_TIMEOU… in rtc_clk_cal_internal()
89 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_150K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
105 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)) { in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_time.c73 REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, 1); in rtc_clk_cal_internal()
75 && !GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)); in rtc_clk_cal_internal()
87 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_X32K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
90 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_8MD256_CAL_TIMEOU… in rtc_clk_cal_internal()
93 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_150K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
109 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)) { in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Drtc_time.c71 REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, 1); in rtc_clk_cal_internal()
73 && !GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)); in rtc_clk_cal_internal()
85 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_X32K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
88 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_8MD256_CAL_TIMEOU… in rtc_clk_cal_internal()
91 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_150K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
107 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)) { in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/
Drtc_time.c119 REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, 1); in rtc_clk_cal_internal()
121 && !GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)); in rtc_clk_cal_internal()
133 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_32K_CAL_TIMEOUT_T… in rtc_clk_cal_internal()
136 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_FAST_CLK_20M_CAL_TIMEOUT_T… in rtc_clk_cal_internal()
139 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_150K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
164 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)) { in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/
Drtc_time.c119 REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, 1); in rtc_clk_cal_internal()
121 && !GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)); in rtc_clk_cal_internal()
133 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_32K_CAL_TIMEOUT_T… in rtc_clk_cal_internal()
136 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_FAST_CLK_8M_CAL_TIMEOUT_TH… in rtc_clk_cal_internal()
139 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_150K_CAL_TIMEOUT_… in rtc_clk_cal_internal()
164 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)) { in rtc_clk_cal_internal()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_time.c43 REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, 1); in rtc_clk_cal_internal_oneoff()
45 && !GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)); in rtc_clk_cal_internal_oneoff()
57 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_X32K_CAL_TIMEOUT_… in rtc_clk_cal_internal_oneoff()
60 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_8MD256_CAL_TIMEOU… in rtc_clk_cal_internal_oneoff()
63 …REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_90K_CAL_TIMEOUT_T… in rtc_clk_cal_internal_oneoff()
79 if (GET_PERI_REG_MASK(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT)) { in rtc_clk_cal_internal_oneoff()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dtimer_group_reg.h519 #define TIMG_RTCCALICFG2_REG(i) (REG_TIMG_BASE(i) + 0x80) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dtimer_group_reg.h515 #define TIMG_RTCCALICFG2_REG(i) (DR_REG_TIMG_BASE(i) + 0x80) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dtimer_group_reg.h515 #define TIMG_RTCCALICFG2_REG(i) (DR_REG_TIMG_BASE(i) + 0x80) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dtimer_group_reg.h519 #define TIMG_RTCCALICFG2_REG(i) (REG_TIMG_BASE(i) + 0x80) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dtimer_group_reg.h654 #define TIMG_RTCCALICFG2_REG(i) (REG_TIMG_BASE(i) + 0x80) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dtimer_group_reg.h964 #define TIMG_RTCCALICFG2_REG(i) (DR_REG_TIMG_BASE(i) + 0xa8) macro