Searched refs:SPI_USER_REG (Results 1 – 12 of 12) sorted by relevance
| /hal_espressif-latest/components/esp_psram/esp32/ |
| D | esp_psram_impl_quad.c | 246 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_QIO); in psram_set_basic_write_mode()
247 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_DIO); in psram_set_basic_write_mode()
248 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_QUAD); in psram_set_basic_write_mode()
249 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_DUAL); in psram_set_basic_write_mode()
254 SET_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_QIO); in psram_set_qio_write_mode()
255 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_DIO); in psram_set_qio_write_mode()
256 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_QUAD); in psram_set_qio_write_mode()
257 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_FWRITE_DUAL); in psram_set_qio_write_mode()
285 uint32_t mode_backup = (READ_PERI_REG(SPI_USER_REG(spi_num)) >> SPI_FWRITE_DUAL_S) & 0xf; in psram_cmd_recv_start()
305 …SET_PERI_REG_BITS(SPI_USER_REG(spi_num), (pRxData?SPI_FWRITE_DUAL_M:0xf), mode_backup, SPI_FWRITE_… in psram_cmd_recv_start()
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| /hal_espressif-latest/components/esp_rom/patches/ |
| D | esp_rom_spiflash.c | 339 REG_CLR_BIT(SPI_USER_REG(0), SPI_USR_MOSI); in spi_cache_mode_switch()
340 REG_SET_BIT(SPI_USER_REG(0), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR); in spi_cache_mode_switch()
345 REG_CLR_BIT(SPI_USER_REG(0), SPI_USR_MOSI); in spi_cache_mode_switch()
346 REG_SET_BIT(SPI_USER_REG(0), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR); in spi_cache_mode_switch()
363 REG_CLR_BIT(SPI_USER_REG(0), SPI_USR_MOSI); in spi_cache_mode_switch()
365 REG_CLR_BIT(SPI_USER_REG(0), SPI_USR_DUMMY); in spi_cache_mode_switch()
367 REG_SET_BIT(SPI_USER_REG(0), SPI_USR_DUMMY); in spi_cache_mode_switch()
370 REG_SET_BIT(SPI_USER_REG(0), SPI_USR_MISO | SPI_USR_ADDR); in spi_cache_mode_switch()
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| /hal_espressif-latest/zephyr/esp32/src/ |
| D | soc_flash_init.c | 62 SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in flash_cs_timing_config()
65 SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in flash_cs_timing_config()
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| /hal_espressif-latest/components/bootloader_support/bootloader_flash/src/ |
| D | bootloader_flash_config_esp32.c | 49 SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in bootloader_flash_cs_timing_config()
52 SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in bootloader_flash_cs_timing_config()
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| /hal_espressif-latest/components/esp_rom/include/esp32/rom/ |
| D | spi_flash.h | 55 #define PERIPHS_SPI_FLASH_USRREG SPI_USER_REG(1)
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| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | spi_reg.h | 176 #define SPI_USER_REG(i) (REG_SPI_BASE(i) + 0x10) macro
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| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | spi_reg.h | 197 #define SPI_USER_REG(i) (REG_SPI_BASE(i) + 0x10) macro
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| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | spi_reg.h | 205 #define SPI_USER_REG(i) (REG_SPI_BASE(i) + 0x10) macro
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| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | spi_reg.h | 364 #define SPI_USER_REG(i) (REG_SPI_BASE(i) + 0x1C) macro
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| /hal_espressif-latest/components/soc/esp32h2/include/soc/ |
| D | spi_reg.h | 235 #define SPI_USER_REG (DR_REG_SPI_BASE + 0x10) macro
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| /hal_espressif-latest/components/soc/esp32c6/include/soc/ |
| D | spi_reg.h | 235 #define SPI_USER_REG(i) (REG_SPI_BASE(i) + 0x10) macro
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| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | spi_reg.h | 255 #define SPI_USER_REG(i) (REG_SPI_BASE(i) + 0x018) macro
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