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Searched refs:SPI_MEM_USR_RD_SRAM_DUMMY_M (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/esp_psram/esp32s3/
Desp_psram_impl_quad.c414 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_RD_SRAM_DUMMY_M); //enable cache read… in config_psram_spi_phases()
Desp_psram_impl_octal.c366 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_RD_SRAM_DUMMY_M | SPI_MEM_USR_WR_SRAM_DU… in s_config_psram_spi_phases()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dmspi_timing_tuning_ll.h341 SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(spi_num), SPI_MEM_USR_RD_SRAM_DUMMY_M); in mspi_timing_ll_set_quad_psram_dummy()
/hal_espressif-latest/components/esp_psram/esp32s2/
Desp_psram_impl_quad.c519 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_RD_SRAM_DUMMY_M); //enable cache read… in psram_cache_init()
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dspi_mem_reg.h684 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dspi_mem_reg.h702 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dspi_mem_reg.h821 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dspi_mem_reg.h816 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro