Searched refs:SPI_MEM_USR_RD_SRAM_DUMMY_M (Results 1 – 8 of 8) sorted by relevance
414 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_RD_SRAM_DUMMY_M); //enable cache read… in config_psram_spi_phases()
366 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_RD_SRAM_DUMMY_M | SPI_MEM_USR_WR_SRAM_DU… in s_config_psram_spi_phases()
341 SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(spi_num), SPI_MEM_USR_RD_SRAM_DUMMY_M); in mspi_timing_ll_set_quad_psram_dummy()
519 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_RD_SRAM_DUMMY_M); //enable cache read… in psram_cache_init()
684 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro
702 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro
821 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro
816 #define SPI_MEM_USR_RD_SRAM_DUMMY_M (BIT(4)) macro