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Searched refs:SPI_MEM_CACHE_SRAM_USR_RCMD_M (Results 1 – 7 of 7) sorted by relevance

/hal_espressif-latest/components/esp_psram/esp32s3/
Desp_psram_impl_quad.c399 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_CACHE_SRAM_USR_RCMD_M); //enable cache read… in config_psram_spi_phases()
Desp_psram_impl_octal.c357 SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_CACHE_SRAM_USR_RCMD_M); in s_config_psram_spi_phases()
/hal_espressif-latest/components/esp_psram/esp32s2/
Desp_psram_impl_quad.c516 …SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_CACHE_SRAM_USR_RCMD_M); //enable cache read… in psram_cache_init()
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dspi_mem_reg.h677 #define SPI_MEM_CACHE_SRAM_USR_RCMD_M (BIT(5)) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dspi_mem_reg.h695 #define SPI_MEM_CACHE_SRAM_USR_RCMD_M (BIT(5)) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dspi_mem_reg.h814 #define SPI_MEM_CACHE_SRAM_USR_RCMD_M (BIT(5)) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dspi_mem_reg.h809 #define SPI_MEM_CACHE_SRAM_USR_RCMD_M (BIT(5)) macro