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Searched refs:SPI_CS_HOLD_M (Results 1 – 11 of 11) sorted by relevance

/hal_espressif-latest/zephyr/esp32/src/
Dsoc_flash_init.c62 SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in flash_cs_timing_config()
65 SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in flash_cs_timing_config()
/hal_espressif-latest/components/bootloader_support/bootloader_flash/src/
Dbootloader_flash_config_esp32.c49 SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in bootloader_flash_cs_timing_config()
52 SET_PERI_REG_MASK(SPI_USER_REG(1), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in bootloader_flash_cs_timing_config()
/hal_espressif-latest/components/esp_psram/esp32s2/
Desp_psram_impl_quad.c362 CLEAR_PERI_REG_MASK(SPI_MEM_USER_REG(_SPI_CACHE_PORT), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in psram_set_spi0_cache_cs_timing()
/hal_espressif-latest/components/esp_psram/esp32/
Desp_psram_impl_quad.c685 SET_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in psram_set_cs_timing()
690 CLEAR_PERI_REG_MASK(SPI_USER_REG(spi_num), SPI_CS_HOLD_M | SPI_CS_SETUP_M); in psram_set_cs_timing()
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dspi_reg.h287 #define SPI_CS_HOLD_M (BIT(6)) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dspi_reg.h315 #define SPI_CS_HOLD_M (BIT(6)) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dspi_reg.h323 #define SPI_CS_HOLD_M (BIT(6)) macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Dspi_reg.h523 #define SPI_CS_HOLD_M (BIT(4)) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dspi_reg.h273 #define SPI_CS_HOLD_M (SPI_CS_HOLD_V << SPI_CS_HOLD_S) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dspi_reg.h273 #define SPI_CS_HOLD_M (SPI_CS_HOLD_V << SPI_CS_HOLD_S) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dspi_reg.h435 #define SPI_CS_HOLD_M (BIT(6)) macro