| /hal_espressif-latest/zephyr/esp32c2/src/ |
| D | soc_init.c | 49 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); in super_wdt_auto_feed()
51 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); in super_wdt_auto_feed()
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| /hal_espressif-latest/zephyr/esp32c3/src/ |
| D | soc_init.c | 94 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); in super_wdt_auto_feed()
96 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); in super_wdt_auto_feed()
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| /hal_espressif-latest/components/bootloader_support/src/esp32c2/ |
| D | bootloader_esp32c2.c | 80 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); in bootloader_super_wdt_auto_feed()
82 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); in bootloader_super_wdt_auto_feed()
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| /hal_espressif-latest/components/bootloader_support/src/esp32c3/ |
| D | bootloader_esp32c3.c | 85 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); in bootloader_super_wdt_auto_feed()
87 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); in bootloader_super_wdt_auto_feed()
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| /hal_espressif-latest/zephyr/esp32s3/src/ |
| D | soc_init.c | 60 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); in super_wdt_auto_feed()
62 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); in super_wdt_auto_feed()
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| /hal_espressif-latest/tools/esptool_py/esptool/targets/ |
| D | esp32c3.py | 82 RTC_CNTL_SWD_WPROTECT_REG = RTCCNTL_BASE_REG + 0x00B0 variable in ESP32C3ROM
243 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, self.RTC_CNTL_SWD_WKEY)
249 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, 0)
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| D | esp32s3.py | 90 RTC_CNTL_SWD_WPROTECT_REG = RTCCNTL_BASE_REG + 0x00B8 variable in ESP32S3ROM
334 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, self.RTC_CNTL_SWD_WKEY)
340 self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, 0)
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| D | esp32h2.py | 25 RTC_CNTL_SWD_WPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0024 # LP_WDT_SWD_WPROTECT_REG variable in ESP32H2ROM
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| D | esp32c6.py | 79 RTC_CNTL_SWD_WPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0020 # LP_WDT_SWD_WPROTECT_REG variable in ESP32C6ROM
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| /hal_espressif-latest/tools/esptool_py/flasher_stub/include/ |
| D | soc_support.h | 392 #define RTC_CNTL_SWD_WPROTECT_REG (RTCCNTL_BASE_REG + 0x00B8) macro
401 #define RTC_CNTL_SWD_WPROTECT_REG (RTCCNTL_BASE_REG + 0x00B0) macro
410 #define RTC_CNTL_SWD_WPROTECT_REG (DR_REG_LP_WDT_BASE + 0x0020) // LP_WDT_SWD_WPROTECT_REG macro
419 #define RTC_CNTL_SWD_WPROTECT_REG (DR_REG_LP_WDT_BASE + 0x0024) // LP_WDT_SWD_WPROTECT_REG macro
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| /hal_espressif-latest/components/bootloader_support/src/esp32s3/ |
| D | bootloader_esp32s3.c | 128 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE); in bootloader_super_wdt_auto_feed()
130 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0); in bootloader_super_wdt_auto_feed()
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| /hal_espressif-latest/tools/esptool_py/flasher_stub/ |
| D | stub_flasher.c | 119 WRITE_REG(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY); // Disable write protection in disable_watchdogs()
121 WRITE_REG(RTC_CNTL_SWD_WPROTECT_REG, 0x0); // Re-enable write protection in disable_watchdogs()
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| /hal_espressif-latest/tools/esptool_py/test/ |
| D | test_esptool.py | 737 reg_mod.RTC_CNTL_SWD_WPROTECT_REG, reg_mod.RTC_CNTL_SWD_WKEY
742 reg_mod.write_reg(reg_mod.RTC_CNTL_SWD_WPROTECT_REG, 0)
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| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | rtc_cntl_reg.h | 1205 #define RTC_CNTL_SWD_WPROTECT_REG (DR_REG_RTCCNTL_BASE + 0xA4) macro
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| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | rtc_cntl_reg.h | 1773 #define RTC_CNTL_SWD_WPROTECT_REG (DR_REG_RTCCNTL_BASE + 0x00B0) macro
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| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | rtc_cntl_reg.h | 2258 #define RTC_CNTL_SWD_WPROTECT_REG (DR_REG_RTCCNTL_BASE + 0x00B4) macro
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| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | rtc_cntl_reg.h | 2167 #define RTC_CNTL_SWD_WPROTECT_REG (DR_REG_RTCCNTL_BASE + 0xB8) macro
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