1
2 /*
3 * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #include <stdbool.h>
9 #include "soc_init.h"
10 #include "soc/rtc_cntl_reg.h"
11 #include "soc/system_reg.h"
12 #include "soc/assist_debug_reg.h"
13 #include "soc/reset_reasons.h"
14 #include "esp_rom_sys.h"
15 #include "esp_log.h"
16
17 static const char *TAG = "soc_init";
18
ana_super_wdt_reset_config(bool enable)19 void ana_super_wdt_reset_config(bool enable)
20 {
21 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST);
22
23 if (enable) {
24 REG_CLR_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
25 } else {
26 REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
27 }
28 }
29
ana_bod_reset_config(bool enable)30 void ana_bod_reset_config(bool enable)
31 {
32 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOD_RST);
33
34 if (enable) {
35 REG_SET_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
36 } else {
37 REG_CLR_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
38 }
39 }
40
ana_reset_config(void)41 void ana_reset_config(void)
42 {
43 ana_super_wdt_reset_config(true);
44 ana_bod_reset_config(true);
45 }
46
super_wdt_auto_feed(void)47 void super_wdt_auto_feed(void)
48 {
49 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE);
50 REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN);
51 REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);
52 }
53
wdt_reset_cpu0_info_enable(void)54 void wdt_reset_cpu0_info_enable(void)
55 {
56 REG_SET_BIT(SYSTEM_CPU_PERI_CLK_EN_REG, SYSTEM_CLK_EN_ASSIST_DEBUG);
57 REG_CLR_BIT(SYSTEM_CPU_PERI_RST_EN_REG, SYSTEM_RST_EN_ASSIST_DEBUG);
58 REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_EN_REG,
59 ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN | ASSIST_DEBUG_CORE_0_RCD_RECORDEN);
60 }
61
check_wdt_reset(void)62 void check_wdt_reset(void)
63 {
64 int wdt_rst = 0;
65 soc_reset_reason_t rst_reas;
66
67 rst_reas = esp_rom_get_reset_reason(0);
68 if (rst_reas == RESET_REASON_CORE_RTC_WDT || rst_reas == RESET_REASON_CORE_MWDT0 ||
69 rst_reas == RESET_REASON_CPU0_MWDT0 || rst_reas == RESET_REASON_CPU0_RTC_WDT) {
70 ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
71 wdt_rst = 1;
72 }
73
74 wdt_reset_cpu0_info_enable();
75 }
76
77 /* Not supported but common bootloader calls the function. Do nothing */
ana_clock_glitch_reset_config(bool enable)78 void ana_clock_glitch_reset_config(bool enable)
79 {
80 (void)enable;
81 }
82
