Home
last modified time | relevance | path

Searched refs:PSRAM_QUAD_WRITE (Results 1 – 3 of 3) sorted by relevance

/hal_espressif-latest/components/esp_psram/esp32s3/
Desp_psram_impl_quad.c32 #define PSRAM_QUAD_WRITE 0x38 macro
402 …S(SPI_MEM_SRAM_DWR_CMD_REG(0), SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE, PSRAM_QUAD_WRITE, SPI_MEM_CACH… in config_psram_spi_phases()
/hal_espressif-latest/components/esp_psram/esp32/
Desp_psram_impl_quad.c50 #define PSRAM_QUAD_WRITE 0x38 macro
510 uint32_t addr = (PSRAM_QUAD_WRITE << 24) | (address & 0x7fffff); in spi_user_psram_write()
524 addr = (PSRAM_QUAD_WRITE << 24) | ((address & 0x7fffff) + i); in spi_user_psram_write()
1083 SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), SPI_CACHE_SRAM_USR_WR_CMD_VALUE, PSRAM_QUAD_WRITE, in psram_cache_init()
1101 …_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), SPI_CACHE_SRAM_USR_WR_CMD_VALUE, ((PSRAM_QUAD_WRITE) << 8), in psram_cache_init()
/hal_espressif-latest/components/esp_psram/esp32s2/
Desp_psram_impl_quad.c39 #define PSRAM_QUAD_WRITE 0x38 macro
524 …T_PERI_REG_BITS(SPI_MEM_SRAM_DWR_CMD_REG(0), SPI_MEM_CACHE_SRAM_USR_WR_CMD_VALUE, PSRAM_QUAD_WRITE, in psram_cache_init()