Searched refs:BIT1 (Results 1 – 25 of 49) sorted by relevance
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| /hal_espressif-3.6.0/components/esp_rom/include/esp32/rom/ |
| D | rtc.h | 80 DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
118 EXT_EVENT1_TRIG = BIT1,
148 REJECT_INT = BIT1,
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| D | uart.h | 41 #define UART_TRX_INTEN BIT1
48 #define UART_CLR_RCV_FIFO BIT1
57 #define UART_RCV_OVER_FLOW_FLAG BIT1
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| /hal_espressif-3.6.0/components/esp_rom/include/esp32s3/rom/ |
| D | uart.h | 39 #define UART_TRX_INTEN BIT1
46 #define UART_CLR_RCV_FIFO BIT1
55 #define UART_RCV_OVER_FLOW_FLAG BIT1
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| D | rtc.h | 68 DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
117 EXT_EVENT1_TRIG = BIT1,
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| /hal_espressif-3.6.0/components/esp_rom/include/esp32c3/rom/ |
| D | uart.h | 41 #define UART_TRX_INTEN BIT1
48 #define UART_CLR_RCV_FIFO BIT1
57 #define UART_RCV_OVER_FLOW_FLAG BIT1
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| D | rtc.h | 81 DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
130 EXT_EVENT1_TRIG = BIT1,
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| /hal_espressif-3.6.0/components/esp_rom/include/esp32s2/rom/ |
| D | uart.h | 41 #define UART_TRX_INTEN BIT1
48 #define UART_CLR_RCV_FIFO BIT1
57 #define UART_RCV_OVER_FLOW_FLAG BIT1
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| D | rtc.h | 80 DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
120 EXT_EVENT1_TRIG = BIT1,
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| /hal_espressif-3.6.0/components/esp_rom/include/esp32h2/rom/ |
| D | uart.h | 41 #define UART_TRX_INTEN BIT1
48 #define UART_CLR_RCV_FIFO BIT1
57 #define UART_RCV_OVER_FLOW_FLAG BIT1
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| D | rtc.h | 73 DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
124 EXT_EVENT1_TRIG = BIT1,
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| /hal_espressif-3.6.0/examples/wifi/ftm/main/ |
| D | ftm_main.c | 71 const int DISCONNECTED_BIT = BIT1;
75 const int FTM_FAILURE_BIT = BIT1;
88 BIT1 |
158 …sprintf(log, "%s%s%s%s", g_report_lvl & BIT0 ? " Diag |":"", g_report_lvl & BIT1 ? " RTT |":"", in ftm_process_report()
170 if (g_report_lvl & BIT1) { in ftm_process_report()
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| /hal_espressif-3.6.0/components/esp_common/include/ |
| D | esp_bit_defs.h | 48 #define BIT1 0x00000002 macro
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| /hal_espressif-3.6.0/components/soc/esp32h2/include/soc/ |
| D | boot_mode.h | 98 #define SEL_UART_BOOT BIT1
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| D | soc_caps.h | 102 #define SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 …
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| /hal_espressif-3.6.0/components/soc/esp32s2/include/soc/ |
| D | boot_mode.h | 98 #define SEL_UART_BOOT BIT1
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| /hal_espressif-3.6.0/components/soc/esp32s3/include/soc/ |
| D | boot_mode.h | 97 #define SEL_UART_BOOT BIT1
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| /hal_espressif-3.6.0/components/soc/esp32c3/include/soc/ |
| D | boot_mode.h | 98 #define SEL_UART_BOOT BIT1
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| D | soc_caps.h | 114 #define SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 …
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| /hal_espressif-3.6.0/components/soc/esp32/include/soc/ |
| D | boot_mode.h | 102 #define SEL_UART_BOOT BIT1
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| /hal_espressif-3.6.0/components/freemodbus/common/include/ |
| D | esp_modbus_master.h | 79 …PAR_PERMS_WRITE = 1 << BIT1, /**< the characteristi…
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| D | esp_modbus_common.h | 100 MB_EVENT_HOLDING_REG_RD = BIT1, /*!< Modbus Event Read Holding registers. */
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| /hal_espressif-3.6.0/components/bt/host/bluedroid/external/sbc/decoder/include/ |
| D | oi_stddefs.h | 187 #define BIT1 0x00000002 /**< preprocessor alias for 32-bit value with bit 1 set, used to specify… macro
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| /hal_espressif-3.6.0/examples/wifi/getting_started/station/main/ |
| D | station_example_main.c | 38 #define WIFI_FAIL_BIT BIT1
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| /hal_espressif-3.6.0/examples/protocols/esp_local_ctrl/main/ |
| D | app_main.c | 40 #define WIFI_FAIL_BIT BIT1
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| /hal_espressif-3.6.0/examples/wifi/wifi_easy_connect/dpp-enrollee/main/ |
| D | dpp_enrollee_main.c | 48 #define DPP_CONNECT_FAIL_BIT BIT1
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