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Searched refs:REG_OSCCTRL_INTENSET (Results 1 – 11 of 11) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samr35/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40000C04) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
53 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40000C04UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40000C04) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
53 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40000C04UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40001004) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
55 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001004UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/samc20/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40001004) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
55 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001004UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/samc20n/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40001004) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
55 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001004UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40000C04) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
53 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40000C04UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/samc21/instance/
Doscctrl.h36 #define REG_OSCCTRL_INTENSET (0x40001004) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
55 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001004UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Doscctrl.h37 #define REG_OSCCTRL_INTENSET (0x40001008) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
60 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001008UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Doscctrl.h37 #define REG_OSCCTRL_INTENSET (0x40001008) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
60 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001008UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Doscctrl.h37 #define REG_OSCCTRL_INTENSET (0x40001008) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
60 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001008UL) /**< \brief (OSCCTRL) Interrupt Enable… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Doscctrl.h37 #define REG_OSCCTRL_INTENSET (0x40001008) /**< \brief (OSCCTRL) Interrupt Enable Set */ macro
60 #define REG_OSCCTRL_INTENSET (*(RwReg *)0x40001008UL) /**< \brief (OSCCTRL) Interrupt Enable… macro