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Searched refs:CPUDIV (Results 1 – 15 of 15) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samc20/component/
Dmclk.h100 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
334 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samc20n/component/
Dmclk.h100 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
373 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samc21/component/
Dmclk.h100 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
355 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samc21n/component/
Dmclk.h100 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
388 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samr35/component/
Dmclk.h111 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
466 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samr34/component/
Dmclk.h111 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
471 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/saml21/component/
Dmclk.h111 uint8_t CPUDIV:8; /*!< bit: 0.. 7 CPU Clock Division Factor */ member
473 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x04 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samd51/component/
Dmclk.h460 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x05 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/same51/component/
Dmclk.h463 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x05 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/same53/component/
Dmclk.h465 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x05 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samd20/component/
Dpm.h83 uint8_t CPUDIV:3; /*!< bit: 0.. 2 CPU Prescaler Selection */ member
/hal_atmel-latest/asf/sam0/include/same54/component/
Dmclk.h470 …__IO MCLK_CPUDIV_Type CPUDIV; /**< \brief Offset: 0x05 (R/W 8) CPU Clock Division */ member
/hal_atmel-latest/asf/sam0/include/samd21/component/
Dpm.h82 uint8_t CPUDIV:3; /*!< bit: 0.. 2 CPU Prescaler Selection */ member
/hal_atmel-latest/asf/sam0/include/samr21/component/
Dpm.h82 uint8_t CPUDIV:3; /*!< bit: 0.. 2 CPU Prescaler Selection */ member
/hal_atmel-latest/asf/sam/include/sam4l/component/
Dpm.h66 uint32_t CPUDIV:1; /*!< bit: 7 CPU Division */ member