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Searched refs:__RAM2_SIZE (Results 1 – 25 of 41) sorted by relevance

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/cmsis-dsp-latest/dsppp/RTE/Device/SSE_300_MPS3/
Dac6_linker_script.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dregions_V2M_MPS3_SSE_300_FVP.h58 #define __RAM2_SIZE 0x00020000 macro
Dgcc_linker_script.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
/cmsis-dsp-latest/dsppp/linker_scripts/
Dac6_m0p_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dac6_m4_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dgcc_m0p_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_sse300_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rw) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_sse310_mps3_s.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_m4_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM0P/
Dac6_linker_script.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dgcc_linker_script.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/linker_scripts/
Dac6_m0p_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dac6_m33_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dac6_m3_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dac6_m4_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dac6_m7_mps3_s.sct76 #if __RAM2_SIZE > 0
77 RW_RAM2 __RAM2_BASE __RAM2_SIZE {
Dgcc_m0p_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_m33_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_m3_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_m4_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_m7_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rwx) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
Dgcc_sse300_mps3.ld48 #if __RAM2_SIZE > 0
49 RAM2 (rw) : ORIGIN = __RAM2_BASE, LENGTH = __RAM2_SIZE
/cmsis-dsp-latest/Examples/cmsis_build/projects/RTE/Device/SSE_300_MPS3/
Dregions_SSE_300_MPS3.h58 #define __RAM2_SIZE 0x00020000 macro
/cmsis-dsp-latest/Examples/cmsis_build/projects/RTE/Device/SSE_310_MPS3/
Dregions_SSE_310_MPS3.h58 #define __RAM2_SIZE 0x00002000 macro
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dregions_SSE-310-MPS3.h58 #define __RAM2_SIZE 0x00002000 macro

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