1 #ifndef REGIONS_SSE_310_MPS3_H
2 #define REGIONS_SSE_310_MPS3_H
3 
4 
5 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
6 
7 // <n>Device pack:   ARM::V2M_MPS3_SSE_310_BSP@1.1.0
8 // <i>Device pack used to generate this file
9 
10 // <h>ROM Configuration
11 // =======================
12 // </h>
13 
14 // <h>RAM Configuration
15 // =======================
16 // <h> ITCM_NS=<__RAM0>
17 //   <o> Base address <0x0-0xFFFFFFFF:8>
18 //   <i> Defines base address of memory region.
19 //   <i> Default: 0x00000000
20 #define __RAM0_BASE 0x00000000
21 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
22 //   <i> Defines size of memory region.
23 //   <i> Default: 0x00008000
24 #define __RAM0_SIZE 0x00008000
25 //   <q>Default region
26 //   <i> Enables memory region globally for the application.
27 #define __RAM0_DEFAULT 1
28 //   <q>No zero initialize
29 //   <i> Excludes region from zero initialization.
30 #define __RAM0_NOINIT 0
31 // </h>
32 
33 // <h> SRAM_NS=<__RAM1>
34 //   <o> Base address <0x0-0xFFFFFFFF:8>
35 //   <i> Defines base address of memory region.
36 //   <i> Default: 0x01000000
37 #define __RAM1_BASE 0x01000000
38 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
39 //   <i> Defines size of memory region.
40 //   <i> Default: 0x00200000
41 #define __RAM1_SIZE 0x00200000
42 //   <q>Default region
43 //   <i> Enables memory region globally for the application.
44 #define __RAM1_DEFAULT 1
45 //   <q>No zero initialize
46 //   <i> Excludes region from zero initialization.
47 #define __RAM1_NOINIT 0
48 // </h>
49 
50 // <h> DTCM0_NS=<__RAM2>
51 //   <o> Base address <0x0-0xFFFFFFFF:8>
52 //   <i> Defines base address of memory region.
53 //   <i> Default: 0x20000000
54 #define __RAM2_BASE 0x20000000
55 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
56 //   <i> Defines size of memory region.
57 //   <i> Default: 0x00002000
58 #define __RAM2_SIZE 0x00002000
59 //   <q>Default region
60 //   <i> Enables memory region globally for the application.
61 #define __RAM2_DEFAULT 1
62 //   <q>No zero initialize
63 //   <i> Excludes region from zero initialization.
64 #define __RAM2_NOINIT 0
65 // </h>
66 
67 // <h> DTCM1_NS=<__RAM3>
68 //   <o> Base address <0x0-0xFFFFFFFF:8>
69 //   <i> Defines base address of memory region.
70 //   <i> Default: 0x20002000
71 #define __RAM3_BASE 0x20002000
72 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
73 //   <i> Defines size of memory region.
74 //   <i> Default: 0x00002000
75 #define __RAM3_SIZE 0x00002000
76 //   <q>Default region
77 //   <i> Enables memory region globally for the application.
78 #define __RAM3_DEFAULT 1
79 //   <q>No zero initialize
80 //   <i> Excludes region from zero initialization.
81 #define __RAM3_NOINIT 0
82 // </h>
83 
84 // <h> DTCM2_NS=<__RAM4>
85 //   <o> Base address <0x0-0xFFFFFFFF:8>
86 //   <i> Defines base address of memory region.
87 //   <i> Default: 0x20004000
88 #define __RAM4_BASE 0x20004000
89 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
90 //   <i> Defines size of memory region.
91 //   <i> Default: 0x00002000
92 #define __RAM4_SIZE 0x00002000
93 //   <q>Default region
94 //   <i> Enables memory region globally for the application.
95 #define __RAM4_DEFAULT 1
96 //   <q>No zero initialize
97 //   <i> Excludes region from zero initialization.
98 #define __RAM4_NOINIT 0
99 // </h>
100 
101 // <h> DTCM3_NS=<__RAM5>
102 //   <o> Base address <0x0-0xFFFFFFFF:8>
103 //   <i> Defines base address of memory region.
104 //   <i> Default: 0x20006000
105 #define __RAM5_BASE 0x20006000
106 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
107 //   <i> Defines size of memory region.
108 //   <i> Default: 0x00002000
109 #define __RAM5_SIZE 0x00002000
110 //   <q>Default region
111 //   <i> Enables memory region globally for the application.
112 #define __RAM5_DEFAULT 1
113 //   <q>No zero initialize
114 //   <i> Excludes region from zero initialization.
115 #define __RAM5_NOINIT 0
116 // </h>
117 
118 // <h> ISRAM0_NS=<__RAM6>
119 //   <o> Base address <0x0-0xFFFFFFFF:8>
120 //   <i> Defines base address of memory region.
121 //   <i> Default: 0x21000000
122 #define __RAM6_BASE 0x21000000
123 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
124 //   <i> Defines size of memory region.
125 //   <i> Default: 0x00200000
126 #define __RAM6_SIZE 0x00200000
127 //   <q>Default region
128 //   <i> Enables memory region globally for the application.
129 #define __RAM6_DEFAULT 1
130 //   <q>No zero initialize
131 //   <i> Excludes region from zero initialization.
132 #define __RAM6_NOINIT 0
133 // </h>
134 
135 // <h> ISRAM1_NS=<__RAM7>
136 //   <o> Base address <0x0-0xFFFFFFFF:8>
137 //   <i> Defines base address of memory region.
138 //   <i> Default: 0x21200000
139 #define __RAM7_BASE 0x21200000
140 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
141 //   <i> Defines size of memory region.
142 //   <i> Default: 0x00200000
143 #define __RAM7_SIZE 0x00200000
144 //   <q>Default region
145 //   <i> Enables memory region globally for the application.
146 #define __RAM7_DEFAULT 1
147 //   <q>No zero initialize
148 //   <i> Excludes region from zero initialization.
149 #define __RAM7_NOINIT 0
150 // </h>
151 
152 // <h> QSPI_SRAM_NS=<__RAM8>
153 //   <o> Base address <0x0-0xFFFFFFFF:8>
154 //   <i> Defines base address of memory region.
155 //   <i> Default: 0x28000000
156 #define __RAM8_BASE 0x28000000
157 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
158 //   <i> Defines size of memory region.
159 //   <i> Default: 0x00800000
160 #define __RAM8_SIZE 0x00800000
161 //   <q>Default region
162 //   <i> Enables memory region globally for the application.
163 #define __RAM8_DEFAULT 1
164 //   <q>No zero initialize
165 //   <i> Excludes region from zero initialization.
166 #define __RAM8_NOINIT 0
167 // </h>
168 
169 // <h> ITCM_S=<__RAM9>
170 //   <o> Base address <0x0-0xFFFFFFFF:8>
171 //   <i> Defines base address of memory region.
172 //   <i> Default: 0x10000000
173 #define __RAM9_BASE 0x10000000
174 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
175 //   <i> Defines size of memory region.
176 //   <i> Default: 0x00008000
177 #define __RAM9_SIZE 0x00008000
178 //   <q>Default region
179 //   <i> Enables memory region globally for the application.
180 #define __RAM9_DEFAULT 1
181 //   <q>No zero initialize
182 //   <i> Excludes region from zero initialization.
183 #define __RAM9_NOINIT 0
184 // </h>
185 
186 // <h> SRAM_S=<__RAM10>
187 //   <o> Base address <0x0-0xFFFFFFFF:8>
188 //   <i> Defines base address of memory region.
189 //   <i> Default: 0x11000000
190 #define __RAM10_BASE 0x11000000
191 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
192 //   <i> Defines size of memory region.
193 //   <i> Default: 0x00200000
194 #define __RAM10_SIZE 0x00200000
195 //   <q>Default region
196 //   <i> Enables memory region globally for the application.
197 #define __RAM10_DEFAULT 1
198 //   <q>No zero initialize
199 //   <i> Excludes region from zero initialization.
200 #define __RAM10_NOINIT 0
201 // </h>
202 
203 // <h> DTCM0_S=<__RAM11>
204 //   <o> Base address <0x0-0xFFFFFFFF:8>
205 //   <i> Defines base address of memory region.
206 //   <i> Default: 0x30000000
207 #define __RAM11_BASE 0x30000000
208 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
209 //   <i> Defines size of memory region.
210 //   <i> Default: 0x00002000
211 #define __RAM11_SIZE 0x00002000
212 //   <q>Default region
213 //   <i> Enables memory region globally for the application.
214 #define __RAM11_DEFAULT 1
215 //   <q>No zero initialize
216 //   <i> Excludes region from zero initialization.
217 #define __RAM11_NOINIT 0
218 // </h>
219 
220 // <h> DTCM1_S=<__RAM12>
221 //   <o> Base address <0x0-0xFFFFFFFF:8>
222 //   <i> Defines base address of memory region.
223 //   <i> Default: 0x30002000
224 #define __RAM12_BASE 0x30002000
225 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
226 //   <i> Defines size of memory region.
227 //   <i> Default: 0x00002000
228 #define __RAM12_SIZE 0x00002000
229 //   <q>Default region
230 //   <i> Enables memory region globally for the application.
231 #define __RAM12_DEFAULT 1
232 //   <q>No zero initialize
233 //   <i> Excludes region from zero initialization.
234 #define __RAM12_NOINIT 0
235 // </h>
236 
237 // <h> DTCM2_S=<__RAM13>
238 //   <o> Base address <0x0-0xFFFFFFFF:8>
239 //   <i> Defines base address of memory region.
240 //   <i> Default: 0x30004000
241 #define __RAM13_BASE 0x30004000
242 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
243 //   <i> Defines size of memory region.
244 //   <i> Default: 0x00002000
245 #define __RAM13_SIZE 0x00002000
246 //   <q>Default region
247 //   <i> Enables memory region globally for the application.
248 #define __RAM13_DEFAULT 1
249 //   <q>No zero initialize
250 //   <i> Excludes region from zero initialization.
251 #define __RAM13_NOINIT 0
252 // </h>
253 
254 // <h> DTCM3_S=<__RAM14>
255 //   <o> Base address <0x0-0xFFFFFFFF:8>
256 //   <i> Defines base address of memory region.
257 //   <i> Default: 0x30006000
258 #define __RAM14_BASE 0x30006000
259 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
260 //   <i> Defines size of memory region.
261 //   <i> Default: 0x00002000
262 #define __RAM14_SIZE 0x00002000
263 //   <q>Default region
264 //   <i> Enables memory region globally for the application.
265 #define __RAM14_DEFAULT 1
266 //   <q>No zero initialize
267 //   <i> Excludes region from zero initialization.
268 #define __RAM14_NOINIT 0
269 // </h>
270 
271 // <h> ISRAM0_S=<__RAM15>
272 //   <o> Base address <0x0-0xFFFFFFFF:8>
273 //   <i> Defines base address of memory region.
274 //   <i> Default: 0x31000000
275 #define __RAM15_BASE 0x31000000
276 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
277 //   <i> Defines size of memory region.
278 //   <i> Default: 0x00200000
279 #define __RAM15_SIZE 0x00200000
280 //   <q>Default region
281 //   <i> Enables memory region globally for the application.
282 #define __RAM15_DEFAULT 1
283 //   <q>No zero initialize
284 //   <i> Excludes region from zero initialization.
285 #define __RAM15_NOINIT 0
286 // </h>
287 
288 // <h> ISRAM1_S=<__RAM16>
289 //   <o> Base address <0x0-0xFFFFFFFF:8>
290 //   <i> Defines base address of memory region.
291 //   <i> Default: 0x31200000
292 #define __RAM16_BASE 0x31200000
293 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
294 //   <i> Defines size of memory region.
295 //   <i> Default: 0x00200000
296 #define __RAM16_SIZE 0x00200000
297 //   <q>Default region
298 //   <i> Enables memory region globally for the application.
299 #define __RAM16_DEFAULT 1
300 //   <q>No zero initialize
301 //   <i> Excludes region from zero initialization.
302 #define __RAM16_NOINIT 0
303 // </h>
304 
305 // <h> QSPI_SRAM_S=<__RAM17>
306 //   <o> Base address <0x0-0xFFFFFFFF:8>
307 //   <i> Defines base address of memory region.
308 //   <i> Default: 0x38000000
309 #define __RAM17_BASE 0x38000000
310 //   <o> Region size [bytes] <0x0-0xFFFFFFFF:8>
311 //   <i> Defines size of memory region.
312 //   <i> Default: 0x00800000
313 #define __RAM17_SIZE 0x00800000
314 //   <q>Default region
315 //   <i> Enables memory region globally for the application.
316 #define __RAM17_DEFAULT 1
317 //   <q>No zero initialize
318 //   <i> Excludes region from zero initialization.
319 #define __RAM17_NOINIT 0
320 // </h>
321 
322 // </h>
323 
324 // <h>Stack / Heap Configuration
325 //   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
326 //   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
327 #define __STACK_SIZE 0x00000200
328 #define __HEAP_SIZE 0x00000C00
329 // </h>
330 
331 
332 #endif /* REGIONS_SSE_310_MPS3_H */
333