Searched refs:__RAM1_SIZE (Results 1 – 25 of 41) sorted by relevance
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| /cmsis-dsp-latest/dsppp/RTE/Device/SSE_300_MPS3/ |
| D | ac6_linker_script.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | regions_V2M_MPS3_SSE_300_FVP.h | 41 #define __RAM1_SIZE 0x00200000 macro
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| D | gcc_linker_script.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| /cmsis-dsp-latest/dsppp/linker_scripts/ |
| D | ac6_m0p_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | ac6_m4_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | gcc_m0p_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_sse300_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rw) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_sse310_mps3_s.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_m4_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| /cmsis-dsp-latest/dsppp/RTE/Device/ARMCM0P/ |
| D | ac6_linker_script.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | gcc_linker_script.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| /cmsis-dsp-latest/Testing/cmsis_build/linker_scripts/ |
| D | ac6_m0p_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | ac6_m33_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | ac6_m3_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | ac6_m4_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | ac6_m7_mps3_s.sct | 70 #if __RAM1_SIZE > 0
71 RW_RAM1 __RAM1_BASE __RAM1_SIZE {
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| D | gcc_m0p_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_m33_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_m3_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_m4_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_m7_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rwx) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| D | gcc_sse300_mps3.ld | 45 #if __RAM1_SIZE > 0
46 RAM1 (rw) : ORIGIN = __RAM1_BASE, LENGTH = __RAM1_SIZE
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| /cmsis-dsp-latest/Examples/cmsis_build/projects/RTE/Device/SSE_300_MPS3/ |
| D | regions_SSE_300_MPS3.h | 41 #define __RAM1_SIZE 0x00100000 macro
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| /cmsis-dsp-latest/Examples/cmsis_build/projects/RTE/Device/SSE_310_MPS3/ |
| D | regions_SSE_310_MPS3.h | 41 #define __RAM1_SIZE 0x00200000 macro
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| /cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/ |
| D | regions_SSE-310-MPS3.h | 41 #define __RAM1_SIZE 0x00200000 macro
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