/cmsis-3.4.0/CMSIS/DSP/Source/SupportFunctions/ |
D | arm_bitonic_sort_f32.c | 210 float32x4x2_t out1 = vzipq_f32(a.val[0], b.val[0]); in arm_bitonic_resort_16_f32() 211 float32x4x2_t out2 = vzipq_f32(a.val[1], b.val[1]); in arm_bitonic_resort_16_f32() 213 vst1q_f32(pOut, out1.val[0]); in arm_bitonic_resort_16_f32() 214 vst1q_f32(pOut+4, out1.val[1]); in arm_bitonic_resort_16_f32() 215 vst1q_f32(pOut+8, out2.val[0]); in arm_bitonic_resort_16_f32() 216 vst1q_f32(pOut+12, out2.val[1]); in arm_bitonic_resort_16_f32() 273 a = vcombine_f32(vget_low_f32(ab.val[0]), vget_low_f32(cd.val[0])); in arm_bitonic_sort_16_f32() 274 b = vcombine_f32(vget_low_f32(ab.val[1]), vget_low_f32(cd.val[1])); in arm_bitonic_sort_16_f32() 275 c = vcombine_f32(vget_high_f32(ab.val[0]), vget_high_f32(cd.val[0])); in arm_bitonic_sort_16_f32() 276 d = vcombine_f32(vget_high_f32(ab.val[1]), vget_high_f32(cd.val[1])); in arm_bitonic_sort_16_f32() [all …]
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D | arm_float_to_q7.c | 86 tmp.val[0] = vmulq(tmp.val[0], maxQ); in arm_float_to_q7() 87 tmp.val[1] = vmulq(tmp.val[1], maxQ); in arm_float_to_q7() 88 tmp.val[2] = vmulq(tmp.val[2], maxQ); in arm_float_to_q7() 89 tmp.val[3] = vmulq(tmp.val[3], maxQ); in arm_float_to_q7() 94 evVec = vqmovnbq(evVec, vcvtaq_s32_f32(tmp.val[0])); in arm_float_to_q7() 95 evVec = vqmovntq(evVec, vcvtaq_s32_f32(tmp.val[2])); in arm_float_to_q7() 99 oddVec = vqmovnbq(oddVec, vcvtaq_s32_f32(tmp.val[1])); in arm_float_to_q7() 100 oddVec = vqmovntq(oddVec, vcvtaq_s32_f32(tmp.val[3])); in arm_float_to_q7()
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D | arm_float_to_f16.c | 76 vecDst = vcvtbq_f16_f32(vecDst, tmp.val[0]); in arm_float_to_f16() 77 vecDst = vcvttq_f16_f32(vecDst, tmp.val[1]); in arm_float_to_f16() 93 vecDst = vcvtbq_f16_f32(vecDst, tmp.val[0]); in arm_float_to_f16() 94 vecDst = vcvttq_f16_f32(vecDst, tmp.val[1]); in arm_float_to_f16()
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D | arm_q31_to_q7.c | 76 evVec = vshrnbq_n_s32(evVec, tmp.val[0], 16); in arm_q31_to_q7() 77 evVec = vshrntq_n_s32(evVec, tmp.val[2], 16); in arm_q31_to_q7() 81 oddVec = vshrnbq_n_s32(oddVec, tmp.val[1], 16); in arm_q31_to_q7() 82 oddVec = vshrntq_n_s32(oddVec, tmp.val[3], 16); in arm_q31_to_q7()
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D | arm_float_to_q15.c | 84 tmp.val[0] = vmulq(tmp.val[0], maxQ); in arm_float_to_q15() 85 tmp.val[1] = vmulq(tmp.val[1], maxQ); in arm_float_to_q15() 87 vecDst = vqmovnbq(vecDst, vcvtaq_s32_f32(tmp.val[0])); in arm_float_to_q15() 88 vecDst = vqmovntq(vecDst, vcvtaq_s32_f32(tmp.val[1])); in arm_float_to_q15()
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/cmsis-3.4.0/CMSIS/DSP/PrivateInclude/ |
D | arm_sorting.h | 111 float32x4_t vtrn128_temp = a.val[1]; \ 112 a.val[1] = b.val[0]; \ 113 b.val[0] = vtrn128_temp ; \ 131 a_0 = vget_low_f32(a.val[0]); \ 132 a_1 = vget_high_f32(a.val[0]); \ 133 a_2 = vget_low_f32(a.val[1]); \ 134 a_3 = vget_high_f32(a.val[1]); \ 135 b_0 = vget_low_f32(b.val[0]); \ 136 b_1 = vget_high_f32(b.val[0]); \ 137 b_2 = vget_low_f32(b.val[1]); \ [all …]
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/cmsis-3.4.0/CMSIS/DSP/Source/TransformFunctions/ |
D | arm_rfft_fast_f16.c | 113 xB.val[0] = vldrhq_gather_shifted_offset_f16(pB, vecStridesBkwd); in stage_rfft_f16() 114 xB.val[1] = vldrhq_gather_shifted_offset_f16(&pB[1], vecStridesBkwd); in stage_rfft_f16() 116 xB.val[1] = vnegq_f16(xB.val[1]); in stage_rfft_f16() 124 tmp1.val[0] = vaddq_f16(xA.val[0],xB.val[0]); in stage_rfft_f16() 125 tmp1.val[1] = vaddq_f16(xA.val[1],xB.val[1]); in stage_rfft_f16() 127 tmp2.val[0] = vsubq_f16(xB.val[0],xA.val[0]); in stage_rfft_f16() 128 tmp2.val[1] = vsubq_f16(xB.val[1],xA.val[1]); in stage_rfft_f16() 130 res.val[0] = vmulq(tw.val[0], tmp2.val[0]); in stage_rfft_f16() 131 res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); in stage_rfft_f16() 133 res.val[1] = vmulq(tw.val[0], tmp2.val[1]); in stage_rfft_f16() [all …]
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D | arm_rfft_fast_f32.c | 108 xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd); in stage_rfft_f32() 109 xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd); in stage_rfft_f32() 111 xB.val[1] = vnegq_f32(xB.val[1]); in stage_rfft_f32() 119 tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]); in stage_rfft_f32() 120 tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]); in stage_rfft_f32() 122 tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]); in stage_rfft_f32() 123 tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]); in stage_rfft_f32() 125 res.val[0] = vmulq(tw.val[0], tmp2.val[0]); in stage_rfft_f32() 126 res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); in stage_rfft_f32() 128 res.val[1] = vmulq(tw.val[0], tmp2.val[1]); in stage_rfft_f32() [all …]
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/cmsis-3.4.0/CMSIS/DSP/Include/ |
D | arm_math_memory.h | 79 q31_t val; in read_q15x2() local 82 memcpy (&val, pQ15, 4); in read_q15x2() 84 val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ; in read_q15x2() 87 return (val); in read_q15x2() 98 q31_t val; in read_q15x2_ia() local 101 memcpy (&val, *pQ15, 4); in read_q15x2_ia() 103 val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); in read_q15x2_ia() 107 return (val); in read_q15x2_ia() 118 q31_t val; in read_q15x2_da() local 121 memcpy (&val, *pQ15, 4); in read_q15x2_da() [all …]
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/cmsis-3.4.0/CMSIS/DSP/Source/ComplexMathFunctions/ |
D | arm_cmplx_mag_squared_f32.c | 90 sum = vmulq(vecSrc.val[0], vecSrc.val[0]); in arm_cmplx_mag_squared_f32() 91 sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); in arm_cmplx_mag_squared_f32() 151 vRealA = vmulq_f32(vecA.val[0], vecA.val[0]); in arm_cmplx_mag_squared_f32() 152 vImagA = vmulq_f32(vecA.val[1], vecA.val[1]); in arm_cmplx_mag_squared_f32() 158 vRealB = vmulq_f32(vecB.val[0], vecB.val[0]); in arm_cmplx_mag_squared_f32() 159 vImagB = vmulq_f32(vecB.val[1], vecB.val[1]); in arm_cmplx_mag_squared_f32()
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D | arm_cmplx_mag_f32.c | 101 sum = vmulq(vecSrc.val[0], vecSrc.val[0]); in arm_cmplx_mag_f32() 102 sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); in arm_cmplx_mag_f32() 189 vRealA = vmulq_f32(vecA.val[0], vecA.val[0]); in arm_cmplx_mag_f32() 190 vImagA = vmulq_f32(vecA.val[1], vecA.val[1]); in arm_cmplx_mag_f32() 193 vRealB = vmulq_f32(vecB.val[0], vecB.val[0]); in arm_cmplx_mag_f32() 194 vImagB = vmulq_f32(vecB.val[1], vecB.val[1]); in arm_cmplx_mag_f32()
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D | arm_cmplx_dot_prod_f32.c | 218 accR = vmlaq_f32(accR,vec1.val[0],vec2.val[0]); in arm_cmplx_dot_prod_f32() 219 accR = vmlsq_f32(accR,vec1.val[1],vec2.val[1]); in arm_cmplx_dot_prod_f32() 222 accI = vmlaq_f32(accI,vec1.val[1],vec2.val[0]); in arm_cmplx_dot_prod_f32() 223 accI = vmlaq_f32(accI,vec1.val[0],vec2.val[1]); in arm_cmplx_dot_prod_f32() 233 accR = vmlaq_f32(accR,vec3.val[0],vec4.val[0]); in arm_cmplx_dot_prod_f32() 234 accR = vmlsq_f32(accR,vec3.val[1],vec4.val[1]); in arm_cmplx_dot_prod_f32() 237 accI = vmlaq_f32(accI,vec3.val[1],vec4.val[0]); in arm_cmplx_dot_prod_f32() 238 accI = vmlaq_f32(accI,vec3.val[0],vec4.val[1]); in arm_cmplx_dot_prod_f32()
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D | arm_cmplx_mult_cmplx_f32.c | 208 outCplx.val[0] = vmulq_f32(va.val[0], vb.val[0]); in arm_cmplx_mult_cmplx_f32() 209 outCplx.val[0] = vmlsq_f32(outCplx.val[0], va.val[1], vb.val[1]); in arm_cmplx_mult_cmplx_f32() 212 outCplx.val[1] = vmulq_f32(va.val[0], vb.val[1]); in arm_cmplx_mult_cmplx_f32() 213 outCplx.val[1] = vmlaq_f32(outCplx.val[1], va.val[1], vb.val[0]); in arm_cmplx_mult_cmplx_f32()
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D | arm_cmplx_mag_f16.c | 97 sum = vmulq(vecSrc.val[0], vecSrc.val[0]); in arm_cmplx_mag_f16() 98 sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); in arm_cmplx_mag_f16() 143 sum = vmulq(vecSrc.val[0], vecSrc.val[0]); in arm_cmplx_mag_f16() 144 sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); in arm_cmplx_mag_f16()
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D | arm_cmplx_mag_squared_f16.c | 90 sum = vmulq_m(vuninitializedq_f16(),vecSrc.val[0], vecSrc.val[0],p); in arm_cmplx_mag_squared_f16() 91 sum = vfmaq_m(sum, vecSrc.val[1], vecSrc.val[1],p); in arm_cmplx_mag_squared_f16()
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D | arm_cmplx_mult_real_f32.c | 151 outCplx.val[0] = vmulq_f32(ab.val[0], r); in arm_cmplx_mult_real_f32() 152 outCplx.val[1] = vmulq_f32(ab.val[1], r); in arm_cmplx_mult_real_f32()
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D | arm_cmplx_mag_q31.c | 76 sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]), in arm_cmplx_mag_q31() 77 vmulhq(vecSrc.val[1], vecSrc.val[1])); in arm_cmplx_mag_q31()
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D | arm_cmplx_mag_squared_q31.c | 72 vReal = vmulhq(vecSrc.val[0], vecSrc.val[0]); in arm_cmplx_mag_squared_q31() 73 vImag = vmulhq(vecSrc.val[1], vecSrc.val[1]); in arm_cmplx_mag_squared_q31()
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/cmsis-3.4.0/CMSIS/NN/Include/ |
D | arm_nnsupportfunctions.h | 493 q31_t val; in arm_nn_read_q15x2_ia() local 495 memcpy(&val, *in_q15, 4); in arm_nn_read_q15x2_ia() 498 return (val); in arm_nn_read_q15x2_ia() 508 q31_t val; in arm_nn_read_q7x4_ia() local 509 memcpy(&val, *in_q7, 4); in arm_nn_read_q7x4_ia() 512 return (val); in arm_nn_read_q7x4_ia() 522 q31_t val; in arm_nn_read_q15x2() local 523 memcpy(&val, in_q15, 4); in arm_nn_read_q15x2() 525 return (val); in arm_nn_read_q15x2() 535 q31_t val; in arm_nn_read_q7x4() local [all …]
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/cmsis-3.4.0/CMSIS/Core/Include/ |
D | cmsis_compiler.h | 106 …#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v… argument 114 …#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->… argument 178 …#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->… argument 186 …#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->… argument 249 …#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->… argument 257 …#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->… argument
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D | cmsis_armcc.h | 91 #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) argument 97 #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) argument 481 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) in __SSAT() argument 487 if (val > max) in __SSAT() 491 else if (val < min) in __SSAT() 496 return val; in __SSAT() 506 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) in __USAT() argument 511 if (val > (int32_t)max) in __USAT() 515 else if (val < 0) in __USAT() 520 return (uint32_t)val; in __USAT()
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D | cmsis_armclang.h | 77 …#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->… argument 93 …#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->… argument 526 __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) in __SSAT() argument 532 if (val > max) in __SSAT() 536 else if (val < min) in __SSAT() 541 return val; in __SSAT() 551 __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) in __USAT() argument 556 if (val > (int32_t)max) in __USAT() 560 else if (val < 0) in __USAT() 565 return (uint32_t)val; in __USAT()
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D | cmsis_iccarm.h | 195 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) in __iar_uint16_write() argument 197 *(__packed uint16_t*)(ptr) = val;; in __iar_uint16_write() 217 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) in __iar_uint32_write() argument 219 *(__packed uint32_t*)(ptr) = val;; in __iar_uint32_write() 436 __IAR_FT int16_t __REVSH(int16_t val) in __REVSH() argument 438 return (int16_t) __iar_builtin_REVSH(val); in __REVSH() 831 __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) in __SSAT() argument 837 if (val > max) in __SSAT() 841 else if (val < min) in __SSAT() 846 return val; in __SSAT() [all …]
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/cmsis-3.4.0/CMSIS/DSP/Source/MatrixFunctions/ |
D | arm_mat_trans_f32.c | 151 rb0 = vzipq_f32(ra0.val[0],ra1.val[0]); in arm_mat_trans_f32() 152 rb1 = vzipq_f32(ra0.val[1],ra1.val[1]); in arm_mat_trans_f32() 154 vst1q_f32(px,rb0.val[0]); in arm_mat_trans_f32() 157 vst1q_f32(px,rb0.val[1]); in arm_mat_trans_f32() 160 vst1q_f32(px,rb1.val[0]); in arm_mat_trans_f32() 163 vst1q_f32(px,rb1.val[1]); in arm_mat_trans_f32()
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/cmsis-3.4.0/CMSIS/DSP/Source/FilteringFunctions/ |
D | arm_biquad_cascade_df2T_f32.c | 249 s = dV.val[0]; in arm_biquad_cascade_df2T_f32() 252 s = vextq_f32(zeroV,dV.val[0],3); in arm_biquad_cascade_df2T_f32() 255 s = vextq_f32(zeroV,dV.val[0],2); in arm_biquad_cascade_df2T_f32() 258 s = vextq_f32(zeroV,dV.val[0],1); in arm_biquad_cascade_df2T_f32() 265 dV.val[0] = vmlaq_f32(dV.val[1], s, b1V); in arm_biquad_cascade_df2T_f32() 266 dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V); in arm_biquad_cascade_df2T_f32() 268 dV.val[1] = vmulq_f32(s, b2V); in arm_biquad_cascade_df2T_f32() 269 dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V); in arm_biquad_cascade_df2T_f32()
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