Searched refs:src_clk (Results 1 – 9 of 9) sorted by relevance
119 int enabled_clock(uint32_t src_clk) in enabled_clock() argument121 if ((src_clk == STM32_SRC_SYSCLK) || in enabled_clock()122 (src_clk == STM32_SRC_HCLK) || in enabled_clock()123 (src_clk == STM32_SRC_PCLK1) || in enabled_clock()124 (src_clk == STM32_SRC_PCLK2) || in enabled_clock()125 (src_clk == STM32_SRC_PCLK3) || in enabled_clock()126 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()127 ((src_clk == STM32_SRC_HSI) && IS_ENABLED(STM32_HSI_ENABLED)) || in enabled_clock()128 ((src_clk == STM32_SRC_HSI48) && IS_ENABLED(STM32_HSI48_ENABLED)) || in enabled_clock()129 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()[all …]
124 int enabled_clock(uint32_t src_clk) in enabled_clock() argument126 if ((src_clk == STM32_SRC_SYSCLK) || in enabled_clock()127 (src_clk == STM32_SRC_HCLK) || in enabled_clock()128 (src_clk == STM32_SRC_PCLK1) || in enabled_clock()129 (src_clk == STM32_SRC_PCLK2) || in enabled_clock()130 (src_clk == STM32_SRC_PCLK3) || in enabled_clock()131 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()132 ((src_clk == STM32_SRC_HSI16) && IS_ENABLED(STM32_HSI_ENABLED)) || in enabled_clock()133 ((src_clk == STM32_SRC_HSI48) && IS_ENABLED(STM32_HSI48_ENABLED)) || in enabled_clock()134 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()[all …]
44 int enabled_clock(uint32_t src_clk) in enabled_clock() argument46 if ((src_clk == STM32_SRC_SYSCLK) || in enabled_clock()47 (src_clk == STM32_SRC_HCLK1) || in enabled_clock()48 (src_clk == STM32_SRC_HCLK5) || in enabled_clock()49 (src_clk == STM32_SRC_PCLK1) || in enabled_clock()50 (src_clk == STM32_SRC_PCLK2) || in enabled_clock()51 (src_clk == STM32_SRC_PCLK7) || in enabled_clock()52 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()53 ((src_clk == STM32_SRC_HSI16) && IS_ENABLED(STM32_HSI_ENABLED)) || in enabled_clock()54 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) || in enabled_clock()[all …]
358 int enabled_clock(uint32_t src_clk) argument361 if ((src_clk == STM32_SRC_SYSCLK) ||362 ((src_clk == STM32_SRC_CKPER) && IS_ENABLED(STM32_CKPER_ENABLED)) ||363 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) ||364 ((src_clk == STM32_SRC_HSI_KER) && IS_ENABLED(STM32_HSI_ENABLED)) ||365 ((src_clk == STM32_SRC_CSI_KER) && IS_ENABLED(STM32_CSI_ENABLED)) ||366 ((src_clk == STM32_SRC_HSI48) && IS_ENABLED(STM32_HSI48_ENABLED)) ||367 ((src_clk == STM32_SRC_LSE) && IS_ENABLED(STM32_LSE_ENABLED)) ||368 ((src_clk == STM32_SRC_LSI) && IS_ENABLED(STM32_LSI_ENABLED)) ||369 ((src_clk == STM32_SRC_PLL1_P) && IS_ENABLED(STM32_PLL_P_ENABLED)) ||[all …]
62 int enabled_clock(uint32_t src_clk);
179 int enabled_clock(uint32_t src_clk) in enabled_clock() argument183 switch (src_clk) { in enabled_clock()
120 int enabled_clock(uint32_t src_clk) in enabled_clock() argument124 switch (src_clk) { in enabled_clock()
120 static int uart_set_npcx_baud_rate(struct uart_reg *const inst, int baud_rate, int src_clk) in uart_set_npcx_baud_rate() argument128 if (src_clk == MHZ(15)) { in uart_set_npcx_baud_rate()131 } else if (src_clk == MHZ(20)) { in uart_set_npcx_baud_rate()134 } else if (src_clk == MHZ(25)) { in uart_set_npcx_baud_rate()137 } else if (src_clk == MHZ(30)) { in uart_set_npcx_baud_rate()140 } else if (src_clk == MHZ(48)) { in uart_set_npcx_baud_rate()143 } else if (src_clk == MHZ(50)) { in uart_set_npcx_baud_rate()150 if (src_clk == MHZ(48)) { in uart_set_npcx_baud_rate()
203 uart_sclk_t src_clk; in uart_esp32_config_get() local207 uart_hal_get_sclk(&data->hal, &src_clk); in uart_esp32_config_get()208 esp_clk_tree_src_get_freq_hz((soc_module_clk_t)src_clk, in uart_esp32_config_get()286 uart_sclk_t src_clk; in uart_esp32_configure() local368 uart_hal_get_sclk(&data->hal, &src_clk); in uart_esp32_configure()369 esp_clk_tree_src_get_freq_hz((soc_module_clk_t)src_clk, in uart_esp32_configure()
