| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_max32.c | 17 struct max32_perclk *perclk = (struct max32_perclk *)(clkcfg); in api_on() local
19 switch (perclk->bus) { in api_on()
21 MXC_SYS_ClockEnable((mxc_sys_periph_clock_t)perclk->bit); in api_on()
24 MXC_SYS_ClockEnable((mxc_sys_periph_clock_t)(perclk->bit + 32)); in api_on()
27 MXC_SYS_ClockEnable((mxc_sys_periph_clock_t)(perclk->bit + 64)); in api_on()
39 struct max32_perclk *perclk = (struct max32_perclk *)(clkcfg); in api_off() local
41 switch (perclk->bus) { in api_off()
43 MXC_SYS_ClockDisable((mxc_sys_periph_clock_t)perclk->bit); in api_off()
46 MXC_SYS_ClockDisable((mxc_sys_periph_clock_t)(perclk->bit + 32)); in api_off()
49 MXC_SYS_ClockDisable((mxc_sys_periph_clock_t)(perclk->bit + 64)); in api_off()
[all …]
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_max32.c | 26 struct max32_perclk perclk; member
63 pwm_cfg.clock = Wrap_MXC_TMR_GetClockIndex(cfg->perclk.clk_src); in api_set_cycles()
71 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in api_set_cycles()
97 ret = clock_control_get_rate(cfg->clock, (clock_control_subsys_t)&cfg->perclk, in api_get_cycles_per_sec()
133 .perclk.bus = DT_CLOCKS_CELL(DT_INST_PARENT(_num), offset), \
134 .perclk.bit = DT_CLOCKS_CELL(DT_INST_PARENT(_num), bit), \
135 .perclk.clk_src = DT_PROP(DT_INST_PARENT(_num), clock_source), \
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| /Zephyr-latest/drivers/entropy/ |
| D | entropy_max32.c | 20 struct max32_perclk perclk; member
77 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in entropy_max32_init()
84 .perclk.bus = DT_INST_CLOCKS_CELL(0, offset),
85 .perclk.bit = DT_INST_CLOCKS_CELL(0, bit),
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| /Zephyr-latest/drivers/watchdog/ |
| D | wdt_max32.c | 23 struct max32_perclk perclk; member
127 wdt_max32_calculate_timeout(data->timeout.min, dev_cfg->perclk.clk_src); in wdt_max32_install_timeout()
152 wdt_max32_calculate_timeout(data->timeout.max, dev_cfg->perclk.clk_src); in wdt_max32_install_timeout()
222 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in wdt_max32_init()
227 ret = Wrap_MXC_WDT_SelectClockSource(regs, cfg->perclk.clk_src); in wdt_max32_init()
263 .perclk.clk_src = \
265 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
266 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
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| /Zephyr-latest/drivers/w1/ |
| D | w1_max32.c | 23 struct max32_perclk perclk; member
160 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in w1_max32_init()
196 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
197 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
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| /Zephyr-latest/drivers/adc/ |
| D | adc_max32.c | 35 struct max32_perclk perclk; member
248 .clock = config->perclk.clk_src, in adc_max32_init()
256 ret = clock_control_on(config->clock, (clock_control_subsys_t)&config->perclk); in adc_max32_init()
324 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
325 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
326 .perclk.clk_src = \
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_max32.c | 24 struct max32_perclk perclk; member
235 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in gpio_max32_init()
261 .perclk.bus = DT_INST_PHA_BY_IDX_OR(_num, clocks, 0, offset, 0), \
262 .perclk.bit = DT_INST_PHA_BY_IDX_OR(_num, clocks, 1, bit, 0), \
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| /Zephyr-latest/drivers/serial/ |
| D | uart_max32.c | 23 struct max32_perclk perclk; member
186 err = Wrap_MXC_UART_SetFrequency(regs, uart_cfg->baudrate, cfg->perclk.clk_src); in api_configure()
226 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in uart_max32_init()
437 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
438 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
439 .perclk.clk_src = \
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| /Zephyr-latest/drivers/counter/ |
| D | counter_max32_timer.c | 35 struct max32_perclk perclk; member
268 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in max32_counter_init()
332 .perclk.bus = DT_CLOCKS_CELL(TIMER(_num), offset), \
333 .perclk.bit = DT_CLOCKS_CELL(TIMER(_num), bit), \
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| /Zephyr-latest/drivers/dma/ |
| D | dma_max32.c | 23 struct max32_perclk perclk; member
298 ret = clock_control_on(cfg->clock, (clock_control_subsys_t) &(cfg->perclk)); in max32_dma_init()
345 .perclk.bus = DT_INST_CLOCKS_CELL(inst, offset), \
346 .perclk.bit = DT_INST_CLOCKS_CELL(inst, bit), \
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_max32_rtio.c | 37 struct max32_perclk perclk; member
364 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in i2c_max32_init()
425 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
426 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
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| D | i2c_max32.c | 41 struct max32_perclk perclk; member
861 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in i2c_max32_init()
943 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
944 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
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| /Zephyr-latest/drivers/spi/ |
| D | spi_max32.c | 42 struct max32_perclk perclk; member
867 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in spi_max32_init()
960 .perclk.bus = DT_INST_CLOCKS_CELL(_num, offset), \
961 .perclk.bit = DT_INST_CLOCKS_CELL(_num, bit), \
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