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Searched refs:mpu (Results 1 – 25 of 132) sorted by relevance

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/Zephyr-latest/dts/arm/broadcom/
Dviper-m7.dtsi22 mpu: mpu@e000ed90 { label
23 compatible = "arm,armv7m-mpu";
Dvalkyrie.dtsi21 mpu: mpu@e000ed90 { label
22 compatible = "arm,armv7m-mpu";
/Zephyr-latest/samples/arch/mpu/mpu_test/
DREADME.rst1 .. zephyr:code-sample:: mpu
24 :zephyr-app: samples/arch/mpu/mpu_test
33 :zephyr-app: samples/arch/mpu/mpu_test
51 uart:~$ mpu read
66 uart:~$ mpu write
82 uart:~$ mpu run
96 running the ``mpu run`` command, Zephyr's hard fault handler for AArch32 tries to
100 To verify that the ``mpu run`` test in particular is running correctly, one can
103 * execute ``mpu run`` over UART
111 uart:~$ mpu read
[all …]
/Zephyr-latest/boards/sc/scobc_module1/
Dscobc_module1.dts31 mpu: mpu@e000ed90 { label
32 compatible = "arm,armv7m-mpu";
/Zephyr-latest/boards/digilent/arty_a7/
Darty_a7_designstart_fpga_cortex_m3.dts25 mpu: mpu@e000ed90 { label
26 compatible = "arm,armv7m-mpu";
/Zephyr-latest/boards/arm/v2m_musca_b1/
Dv2m_musca_b1_musca_b1_ns.dts37 mpu: mpu@e000ed90 { label
38 compatible = "arm,armv8m-mpu";
Dv2m_musca_b1.dts56 mpu: mpu@e000ed90 { label
57 compatible = "arm,armv8m-mpu";
/Zephyr-latest/boards/arm/v2m_musca_s1/
Dv2m_musca_s1_musca_s1_ns.dts37 mpu: mpu@e000ed90 { label
38 compatible = "arm,armv8m-mpu";
Dv2m_musca_s1.dts56 mpu: mpu@e000ed90 { label
57 compatible = "arm,armv8m-mpu";
/Zephyr-latest/dts/arm/quicklogic/
Dquicklogic_eos_s3.dtsi23 mpu: mpu@e000ed90 { label
24 compatible = "arm,armv7m-mpu";
/Zephyr-latest/soc/mediatek/mt8xxx/
Dsoc.c190 static const uint32_t mpu[][2] = { in enable_mpu() local
207 int32_t nseg = ARRAY_SIZE(mpu); in enable_mpu()
211 uint32_t addren = mpu[mpuidx][0] | 1; in enable_mpu()
212 uint32_t segprot = (mpu[mpuidx][1]) | i; in enable_mpu()
/Zephyr-latest/dts/arm/nordic/
Dnrf91ns.dtsi23 mpu: mpu@e000ed90 { label
24 compatible = "arm,armv8m-mpu";
Dnrf5340_cpuappns.dtsi25 mpu: mpu@e000ed90 { label
26 compatible = "arm,armv8m-mpu";
Dnrf91.dtsi23 mpu: mpu@e000ed90 { label
24 compatible = "arm,armv8m-mpu";
Dnrf5340_cpuapp.dtsi29 mpu: mpu@e000ed90 { label
30 compatible = "arm,armv8m-mpu";
/Zephyr-latest/boards/arm/mps3/
Dmps3_corstone300_an547.dts39 mpu: mpu@e000ed90 { label
40 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone300_an552.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone300_fvp.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone310_an555.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone310_fvp.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone300_an552_ns.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone300_fvp_ns.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone310_an555_ns.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
Dmps3_corstone310_fvp_ns.dts38 mpu: mpu@e000ed90 { label
39 compatible = "arm,armv8.1m-mpu";
/Zephyr-latest/soc/cdns/sample_controller32/
DCMakeLists.txt5 zephyr_library_sources_ifdef(CONFIG_XTENSA_MPU mpu.c)

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