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Searched refs:clk_dev (Results 1 – 25 of 48) sorted by relevance

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/Zephyr-latest/tests/drivers/clock_control/pwm_clock/src/
Dmain.c15 static const struct device *clk_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(NODELABEL)); variable
23 zassert_equal(device_is_ready(clk_dev), true, "%s: PWM clock device is not ready", in pwm_clock_setup()
24 clk_dev->name); in pwm_clock_setup()
26 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in pwm_clock_setup()
28 clk_dev->name, ret); in pwm_clock_setup()
32 clk_dev->name, clock_rate_dt, clock_rate); in pwm_clock_setup()
34 ret = clock_control_on(clk_dev, 0); in pwm_clock_setup()
35 zassert_equal(0, ret, "%s: Unexpected err (%d) from clock_control_on", clk_dev->name, ret); in pwm_clock_setup()
45 ret = clock_control_get_rate(clk_dev, 0, &clock_rate); in ZTEST()
47 clk_dev->name, ret); in ZTEST()
[all …]
/Zephyr-latest/tests/drivers/clock_control/nrf_clock_control/src/
Dmain.c14 const struct device *clk_dev; member
58 .clk_dev = DEVICE_DT_GET(DT_NODELABEL(fll16m)),
84 .clk_dev = DEVICE_DT_GET(DT_NODELABEL(fll16m)),
92 .clk_dev = DEVICE_DT_GET(DT_NODELABEL(cpuapp_hsfll)),
100 .clk_dev = DEVICE_DT_GET(DT_NODELABEL(cpurad_hsfll)),
124 .clk_dev = DEVICE_DT_GET(DT_NODELABEL(hsfll120)),
150 .clk_dev = DEVICE_DT_GET(DT_NODELABEL(lfclk)),
156 static void test_request_release_clock_spec(const struct device *clk_dev, in test_request_release_clock_spec() argument
164 TC_PRINT("Clock under test: %s\n", clk_dev->name); in test_request_release_clock_spec()
166 ret = nrf_clock_control_request(clk_dev, clk_spec, &cli); in test_request_release_clock_spec()
[all …]
/Zephyr-latest/tests/boards/espressif/rtc_clk/src/
Drtc_clk_test.c23 static const struct device *const clk_dev = DEVICE_DT_GET_ONE(espressif_esp32_rtc); variable
27 zassert_true(device_is_ready(clk_dev), "CLK device is not ready"); in rtc_clk_setup()
31 ret = clock_control_get_rate(clk_dev, in rtc_clk_setup()
37 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_FAST, &rate); in rtc_clk_setup()
42 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, &rate); in rtc_clk_setup()
64 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_CPU, &clk_cfg); in ZTEST()
68 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_CPU, &cpu_rate); in ZTEST()
104 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_CPU, &clk_cfg); in ZTEST()
108 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_CPU, &cpu_rate); in ZTEST()
147 clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_FAST, in ZTEST()
[all …]
/Zephyr-latest/samples/boards/espressif/xt_wdt/src/
Dmain.c19 static const struct device *const clk_dev = DEVICE_DT_GET_ONE(espressif_esp32_rtc); variable
32 if (!device_is_ready(clk_dev)) { in main()
44 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main()
63 clock_control_get_rate(clk_dev, (clock_control_subsys_t)ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW, in main()
/Zephyr-latest/drivers/misc/pio_rpi_pico/
Dpio_rpi_pico.c18 const struct device *clk_dev; member
49 ret = clock_control_on(config->clk_dev, config->clk_id); in pio_rpi_pico_init()
65 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
/Zephyr-latest/tests/drivers/clock_control/nrf_clock_calibration/src/
Dtest_nrf_clock_calibration.c123 const struct device *const clk_dev = DEVICE_DT_GET_ONE(nordic_nrf_clock); in ZTEST() local
126 zassert_true(device_is_ready(clk_dev), "Device is not ready"); in ZTEST()
130 turn_off_clock(clk_dev, CLOCK_CONTROL_NRF_SUBSYS_LF); in ZTEST()
134 turn_on_clock(clk_dev, CLOCK_CONTROL_NRF_SUBSYS_LF); in ZTEST()
/Zephyr-latest/drivers/watchdog/
Dwdt_rpi_pico.c37 const struct device *clk_dev; member
87 err = clock_control_on(config->clk_dev, config->clk_id); in wdt_rpi_pico_setup()
92 err = clock_control_get_rate(config->clk_dev, config->clk_id, &ref_clk); in wdt_rpi_pico_setup()
184 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
Dwdt_dw.c41 const struct device *clk_dev; member
177 if (!device_is_ready(dev_config->clk_dev)) {
182 ret = clock_control_get_rate(dev_config->clk_dev, dev_config->clkid,
263 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
Dwdt_wwdt_numaker.c31 const struct device *clk_dev; member
265 err = clock_control_on(cfg->clk_dev, (clock_control_subsys_t)&scc_subsys); in wwdt_numaker_init()
271 err = clock_control_configure(cfg->clk_dev, (clock_control_subsys_t)&scc_subsys, NULL); in wwdt_numaker_init()
293 .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(0))),
/Zephyr-latest/drivers/input/
Dinput_npcx_kbd.c141 const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in npcx_kbd_init() local
148 if (!device_is_ready(clk_dev)) { in npcx_kbd_init()
149 LOG_ERR("%s device not ready", clk_dev->name); in npcx_kbd_init()
154 ret = clock_control_on(clk_dev, (clock_control_subsys_t)&config->clk_cfg); in npcx_kbd_init()
/Zephyr-latest/drivers/pwm/
Dpwm_npcx.c176 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in pwm_npcx_init() local
187 if (!device_is_ready(clk_dev)) { in pwm_npcx_init()
193 ret = clock_control_on(clk_dev, (clock_control_subsys_t) in pwm_npcx_init()
200 ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t) in pwm_npcx_init()
Dpwm_rpi_pico.c37 const struct device *clk_dev; member
64 ret = clock_control_get_rate(cfg->clk_dev, cfg->clk_id, &pclk); in pwm_rpi_get_cycles_per_sec()
167 err = clock_control_on(cfg->clk_dev, cfg->clk_id); in pwm_rpi_init()
219 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
/Zephyr-latest/drivers/peci/
Dpeci_npcx.c237 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in peci_npcx_init() local
242 if (!device_is_ready(clk_dev)) { in peci_npcx_init()
243 LOG_ERR("%s device not ready", clk_dev->name); in peci_npcx_init()
247 ret = clock_control_on(clk_dev, (clock_control_subsys_t)&config->clk_cfg); in peci_npcx_init()
253 ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t)&config->clk_cfg, in peci_npcx_init()
/Zephyr-latest/drivers/clock_control/
Dclock_control_npcx.c124 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in npcx_clock_control_turn_on_system_sleep() local
125 struct pmc_reg *const inst_pmc = HAL_PMC_INST(clk_dev); in npcx_clock_control_turn_on_system_sleep()
143 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in npcx_clock_control_turn_off_system_sleep() local
144 struct pmc_reg *const inst_pmc = HAL_PMC_INST(clk_dev); in npcx_clock_control_turn_off_system_sleep()
/Zephyr-latest/drivers/can/
Dcan_numaker.c40 const struct device *clk_dev; member
94 rc = clock_control_on(config->clk_dev, (clock_control_subsys_t) &scc_subsys); in can_numaker_init_unlocked()
99 rc = clock_control_configure(config->clk_dev, (clock_control_subsys_t)&scc_subsys, NULL); in can_numaker_init_unlocked()
151 if (!device_is_ready(config->clk_dev)) { in can_numaker_init()
238 .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(inst))),
/Zephyr-latest/drivers/flash/
Dflash_npcx_fiu_qspi.c251 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in qspi_npcx_fiu_init() local
254 if (!device_is_ready(clk_dev)) { in qspi_npcx_fiu_init()
255 LOG_ERR("%s device not ready", clk_dev->name); in qspi_npcx_fiu_init()
260 ret = clock_control_on(clk_dev, in qspi_npcx_fiu_init()
/Zephyr-latest/drivers/timer/
Dnpcx_itim_timer.c338 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in sys_clock_driver_init() local
340 if (!device_is_ready(clk_dev)) { in sys_clock_driver_init()
347 ret = clock_control_on(clk_dev, (clock_control_subsys_t) in sys_clock_driver_init()
359 ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t) in sys_clock_driver_init()
/Zephyr-latest/drivers/sensor/nuvoton/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c316 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in tach_npcx_init() local
319 if (!device_is_ready(clk_dev)) { in tach_npcx_init()
325 ret = clock_control_on(clk_dev, (clock_control_subsys_t) in tach_npcx_init()
332 ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t) in tach_npcx_init()
/Zephyr-latest/drivers/ps2/
Dps2_npcx_controller.c334 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in ps2_npcx_ctrl_init() local
337 if (!device_is_ready(clk_dev)) { in ps2_npcx_ctrl_init()
338 LOG_ERR("%s device not ready", clk_dev->name); in ps2_npcx_ctrl_init()
343 ret = clock_control_on(clk_dev, in ps2_npcx_ctrl_init()
/Zephyr-latest/drivers/counter/
Dcounter_rpi_pico_timer.c37 const struct device *clk_dev; member
177 ret = clock_control_on(config->clk_dev, config->clk_id); in counter_rpi_pico_timer_init()
235 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
Dcounter_dw_timer.c52 const struct device *clk_dev; member
326 if (!device_is_ready(timer_config->clk_dev)) { in counter_dw_timer_init()
330 ret = clock_control_get_rate(timer_config->clk_dev, in counter_dw_timer_init()
366 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
/Zephyr-latest/drivers/spi/
Dspi_numaker.c33 const struct device *clk_dev; member
309 err = clock_control_on(dev_cfg->clk_dev, (clock_control_subsys_t)&scc_subsys); in spi_numaker_init()
314 err = clock_control_configure(dev_cfg->clk_dev, (clock_control_subsys_t)&scc_subsys, NULL); in spi_numaker_init()
360 .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(inst))), \
Dspi_npcx_spip.c362 const struct device *const clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); in spi_npcx_spip_init() local
364 if (!device_is_ready(clk_dev)) { in spi_npcx_spip_init()
369 ret = clock_control_on(clk_dev, (clock_control_subsys_t)&config->clk_cfg); in spi_npcx_spip_init()
375 ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t)&config->clk_cfg, in spi_npcx_spip_init()
/Zephyr-latest/drivers/adc/
Dadc_numaker.c35 const struct device *clk_dev; member
337 err = clock_control_on(cfg->clk_dev, (clock_control_subsys_t)&scc_subsys); in adc_numaker_init()
342 err = clock_control_configure(cfg->clk_dev, (clock_control_subsys_t)&scc_subsys, NULL); in adc_numaker_init()
389 .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(inst))), \
/Zephyr-latest/drivers/gpio/
Dgpio_numaker.c28 const struct device *clk_dev; member
227 #define CLOCK_CTRL_INIT(n) .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(n))),
260 err = clock_control_on(config->clk_dev, (clock_control_subsys_t)&scc_subsys); \

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