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/Zephyr-latest/samples/subsys/portability/cmsis_rtos_v1/philosophers/
DREADME.rst2 :name: Dining Philosophers (CMSIS RTOS V1 APIs)
4 Implement a solution to the Dining Philosophers problem using CMSIS RTOS V1.
10 multi-thread synchronization problem) using CMSIS RTOS V1 APIs. This particular
13 which uses CMSIS RTOS V1 API implementation in Zephyr.
54 CMSIS RTOS V1 APIs. This particular implementation demonstrates the
/Zephyr-latest/drivers/sensor/adi/adltc2990/
Dadltc2990.h16 V1, enumerator
Dadltc2990.c155 case V1: { in adltc2990_fetch_property_value()
286 ret = adltc2990_fetch_property_value(dev, VOLTAGE_DIFFERENTIAL, V1, &value); in adltc2990_sample_fetch()
313 ret = adltc2990_fetch_property_value(dev, VOLTAGE_DIFFERENTIAL, V1, &value); in adltc2990_sample_fetch()
324 ret = adltc2990_fetch_property_value(dev, VOLTAGE_SINGLEENDED, V1, &value); in adltc2990_sample_fetch()
380 ret = adltc2990_fetch_property_value(dev, TEMPERATURE, V1, &value); in adltc2990_sample_fetch()
/Zephyr-latest/boards/st/stm32vl_disco/doc/
Dindex.rst8 integrated ST-LINK debugger and programmer is included (V1), but the only
18 - On-board ST-LINK/V1 with selection mode switch to use the kit as a standalone
19 ST-LINK/V1 (with SWD connector for programming and debugging)
127 STM32VLDISCOVERY board includes an ST-LINK/V1 embedded debug tool interface.
157 The ST-LINK/V1 includes a buggy USB mass storage gadget. To connect to the
/Zephyr-latest/samples/subsys/portability/cmsis_rtos_v1/timer_synchronization/
DREADME.rst2 :name: Synchronization using CMSIS RTOS V1 APIs
9 CMSIS RTOS V1 APIs.
/Zephyr-latest/drivers/flash/
DKconfig.npcx_fiu44 This option enables DRA V1 support.
50 This option enables DRA V1 support.
/Zephyr-latest/drivers/dma/
DKconfig.stm3217 Driver for STM32 DMA V1, V2, V2bis and BDMA types.
35 Enable DMA V1 support.
/Zephyr-latest/drivers/adc/
DKconfig.npcx22 This option enables ADC comparator V1 support.
/Zephyr-latest/samples/sensor/lps22hh_i3c/
DREADME.rst18 STEVALMKI192-V1 connected to the I3C header on :zephyr:board:`mimxrt685_evk`.
29 sensor (for example, the one on evaluation board STEVALMKI192-V1).
/Zephyr-latest/boards/lilygo/ttgo_t7v1_5/doc/
Dindex.rst6 LILYGO® TTGO T7 Mini32 V1.5 ia an IoT mini development board
171 The default baud rate for the Lilygo TTGO T7 V1.5 is set to 1500000bps. If experiencing issues when…
192 The following samples will run out of the box on the TTGO T7 V1.5 board.
213 .. _`Lilygo TTGO T7-V1.5 schematic`: https://github.com/LilyGO/TTGO-T7-Demo/blob/master/t7_v1.5.pdf
/Zephyr-latest/boards/weact/blackpill_f401cc/doc/
Dindex.rst6 The WeAct Black Pill V1.2 Board is an extremely low cost and bare-bones
77 :alt: Black Pill V1.2 Pinout
157 https://stm32-base.org/boards/STM32F401CCU6-WeAct-Black-Pill-V1.2.html
/Zephyr-latest/boards/lilygo/ttgo_t7v1_5/
Dttgo_t7v1_5_esp32_procpu.dts14 model = "ttgo T7 V1.5 PROCPU";
/Zephyr-latest/boards/st/stm32wb5mmg/
Dstm32wb5mmg.dts91 * Since STM32WBCube release V1.13.2, only _HCIOnly_ f/w are supported.
/Zephyr-latest/boards/shields/esp_8266/doc/
Dindex.rst59 V1.6.2. This version is command compatible with ESP8266 AT Bin 1.7.x which is
73 :alt: ESP8266 AT Bin V1.7.3
/Zephyr-latest/boards/espressif/esp32_ethernet_kit/doc/
Dindex.rst27 :alt: ESP32-Ethernet-Kit V1.2
30 ESP32-Ethernet-Kit V1.2
66 :alt: ESP32-Ethernet-Kit V1.2
97 development and debugging. See `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_
217 `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_, sheet 2, location D2.
257 `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_,
401 `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_.
610 .. _`ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`: https://dl.espressif.com/dl/schematics/…
/Zephyr-latest/boards/adi/max32655evkit/doc/
Dindex.rst142 | JP15 | VCOREA_EN | Select VCOREA_EN power source 1V1/VREGO_C …
146 | JP17 | VCOREB_EN | Select VCOREB_EN power source 1V1/VREGO_B …
/Zephyr-latest/boards/adi/max32662evkit/doc/
Dindex.rst179 | | | | 1-2 | | | Connects 1V1 to VCORE. …
181 | | | | Open | | | Disconnects 1V1 from VCORE. …
/Zephyr-latest/boards/segger/trb_stm32f407/doc/
Dindex.rst6 The Cortex-M Trace Reference Board V1.2 (SEGGER-TRB-STM32F407 for short)
/Zephyr-latest/boards/others/stm32f030_demo/doc/
Dindex.rst110 https://stm32-base.org/boards/STM32F030F4P6-STM32F030-DEMO-BOARD-V1.1
/Zephyr-latest/boards/st/stm32wb5mm_dk/
Dstm32wb5mm_dk.dts141 * Since STM32WBCube release V1.13.2, only _HCIOnly_ f/w are supported.
/Zephyr-latest/arch/x86/
DKconfig362 a particular SOC is not vulnerable to the Spectre V1, V1.1, V1.2, and
436 Spectre V1 mitigations by default if the CPU is not known
/Zephyr-latest/boards/gd/gd32f350r_eval/doc/
Dindex.rst134 …https://www.tme.com/Document/ff0a3609934053c07d78ef8662781da9/GD32350R-EVAL%20User%20Manual-V1.0.p…
/Zephyr-latest/boards/st/nucleo_wb55rg/
Dnucleo_wb55rg.dts221 * Since STM32WBCube release V1.13.2, only _HCIOnly_ f/w are supported.
/Zephyr-latest/boards/adi/max32690evkit/doc/
Dindex.rst253 | | | | 1-2 | | | Connects 1V1 to VCORE. …
255 | | | | Open | | | Disconnects 1V1 from VCORE. …
/Zephyr-latest/boards/pine64/pinetime_devkit0/doc/
Dindex.rst196 http://files.pine64.org/doc/PineTime/PineTime%20Schematic-V1.0a-20191103.pdf

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