1.. zephyr:board:: max32655evkit
2
3Overview
4********
5The MAX32655 evaluation kit (EV kit) provides a platform for evaluation capabilities
6of the MAX32655 microcontroller, which is an advanced system-on-chip (SoC).
7It features an Arm® Cortex®-M4F CPU for efficient computation of complex functions and
8algorithms, integrated power management (SIMO), and the newest generation
9Bluetooth® 5.0 Low Energy (Bluetooth LE), long-range radio for wearable and hearable device applications.
10
11The Zephyr port is running on the MAX32655 MCU.
12
13.. image:: img/max32655evkit_img1.jpg
14   :align: center
15   :alt: MAX32655 EVKIT Front
16
17.. image:: img/max32655evkit_img2.jpg
18   :align: center
19   :alt: MAX32655 Back
20
21Hardware
22********
23
24- MAX32655 MCU:
25
26  - Ultra-Low-Power Wireless Microcontroller
27    - Internal 100MHz Oscillator
28    - Flexible Low-Power Modes with 7.3728MHz System Clock Option
29    - 512KB Flash and 128KB SRAM (Optional ECC on One 32KB SRAM Bank)
30    - 16KB Instruction Cache
31  - Bluetooth 5.2 LE Radio
32    - Dedicated, Ultra-Low-Power, 32-Bit RISC-V Coprocessor to Offload Timing-Critical Bluetooth Processing
33    - Fully Open-Source Bluetooth 5.2 Stack Available
34    - Supports AoA, AoD, LE Audio, and Mesh
35    - High-Throughput (2Mbps) Mode
36    - Long-Range (125kbps and 500kbps) Modes
37    - Rx Sensitivity: -97.5dBm; Tx Power: +4.5dBm
38    - Single-Ended Antenna Connection (50Ω)
39  - Power Management Maximizes Battery Life
40    - 2.0V to 3.6V Supply Voltage Range
41    - Integrated SIMO Power Regulator
42    - Dynamic Voltage Scaling (DVS)
43    - 23.8μA/MHz Active Current at 3.0V
44    - 4.4μA at 3.0V Retention Current for 32KB
45    - Selectable SRAM Retention + RTC in Low-Power Modes
46  - Multiple Peripherals for System Control
47    - Up to Two High-Speed SPI Master/Slave
48    - Up to Three High-Speed I2C Master/Slave (3.4Mbps)
49    - Up to Four UART, One I2S Master/Slave
50    - Up to 8-Input, 10-Bit Sigma-Delta ADC 7.8ksps
51    - Up to Four Micro-Power Comparators
52    - Timers: Up to Two Four 32-Bit, Two LP, TwoWatchdog Timers
53    - 1-Wire® Master
54    - Up to Four Pulse Train (PWM) Engines
55    - RTC with Wake-Up Timer
56    - Up to 52 GPIOs
57  - Security and Integrity​
58    - Available Secure Boot
59    - TRNG Seed Generator
60    - AES 128/192/256 Hardware Acceleration Engine
61
62- External devices connected to the MAX32655 EVKIT:
63
64  - Color TFT Display
65  - Audio Stereo Codec Interface
66  - Digital Microphone
67  - A 128Mb QSPI flash
68
69Supported Features
70==================
71
72Below are the interfaces supported by Zephyr on MAX32655EVKIT.
73
74+-----------+------------+-------------------------------------+
75| Interface | Controller | Driver/Component                    |
76+===========+============+=====================================+
77| NVIC      | on-chip    | nested vector interrupt controller  |
78+-----------+------------+-------------------------------------+
79| SYSTICK   | on-chip    | systick                             |
80+-----------+------------+-------------------------------------+
81| CLOCK     | on-chip    | clock and reset control             |
82+-----------+------------+-------------------------------------+
83| GPIO      | on-chip    | gpio                                |
84+-----------+------------+-------------------------------------+
85| UART      | on-chip    | serial                              |
86+-----------+------------+-------------------------------------+
87| TRNG      | on-chip    | entropy                             |
88+-----------+------------+-------------------------------------+
89| I2C       | on-chip    | i2c                                 |
90+-----------+------------+-------------------------------------+
91| DMA       | on-chip    | dma controller                      |
92+-----------+------------+-------------------------------------+
93| Watchdog  | on-chip    | watchdog                            |
94+-----------+------------+-------------------------------------+
95| SPI       | on-chip    | spi                                 |
96+-----------+------------+-------------------------------------+
97| ADC       | on-chip    | adc                                 |
98+-----------+------------+-------------------------------------+
99| Timer     | on-chip    | counter                             |
100+-----------+------------+-------------------------------------+
101| PWM       | on-chip    | pwm                                 |
102+-----------+------------+-------------------------------------+
103| W1        | on-chip    | one wire master                     |
104+-----------+------------+-------------------------------------+
105| Flash     | on-chip    | flash                               |
106+-----------+------------+-------------------------------------+
107
108Connections and IOs
109===================
110
111+-----------+---------------+-----------------------------------------------------------------------+
112| Name      | Signal        | Usage                                                                 |
113+===========+===============+=======================================================================+
114| JP1       | VREGI         | Connect/Disconnect VREGIO power                                       |
115+-----------+---------------+-----------------------------------------------------------------------+
116| JP2       | P0_24         | Enable/Disable LED1                                                   |
117+-----------+---------------+-----------------------------------------------------------------------+
118| JP3       | P0_25         | Enable/Disable LED2                                                   |
119+-----------+---------------+-----------------------------------------------------------------------+
120| JP4       | P2_6/ P2_7    |  Connect/Disconnect the USB to serial UART to GPIO P2_6 (LPUART_RX)   |
121+-----------+---------------+-----------------------------------------------------------------------+
122| JP5       | P2_7/ P0_1    | Connect/Disconnect  the USB to serial UART to GPIO P2_7 (LPUART_TX)   |
123+-----------+---------------+-----------------------------------------------------------------------+
124| JP6       | P0_2          | Connect/Disconnect the USB to serial UART to GPIO P0_2 (UART0_CTS)    |
125+-----------+---------------+-----------------------------------------------------------------------+
126| JP7       | P0_3          | Connect/Disconnect he USB to serial UART to GPIO P0_3 (UART0_RTS)     |
127+-----------+---------------+-----------------------------------------------------------------------+
128| JP8       | VREGI         | Select VDDIO_EN power source (3V3 or coin cell)                       |
129+-----------+---------------+-----------------------------------------------------------------------+
130| JP9       | VDDIOH_EN     | Select VDDIOH_EN power source 3V3/VREGI                               |
131+-----------+---------------+-----------------------------------------------------------------------+
132| JP10      | VDDIOH        | Connect/Disconnect VDDIOH power                                       |
133+-----------+---------------+-----------------------------------------------------------------------+
134| JP11      | VDDIO_EN      | Select VDDIO_EN power source 1V8/VREGO_A                              |
135+-----------+---------------+-----------------------------------------------------------------------+
136| JP12      | VDDIO         | Connect/Disconnect VDDIO power                                        |
137+-----------+---------------+-----------------------------------------------------------------------+
138| JP13      | VDDA_EN       | Select VDDA_EN power source 1V8/VREGO_A                               |
139+-----------+---------------+-----------------------------------------------------------------------+
140| JP14      | VDDA          | Connect/Disconnect VDDA power                                         |
141+-----------+---------------+-----------------------------------------------------------------------+
142| JP15      | VCOREA_EN     | Select VCOREA_EN power source 1V1/VREGO_C                             |
143+-----------+---------------+-----------------------------------------------------------------------+
144| JP16      | VCOREA        |  Connect/Disconnect VCOREA power                                      |
145+-----------+---------------+-----------------------------------------------------------------------+
146| JP17      | VCOREB_EN     | Select VCOREB_EN power source 1V1/VREGO_B                             |
147+-----------+---------------+-----------------------------------------------------------------------+
148| JP18      | VCOREB        | Connect/Disconnect VCOREB power                                       |
149+-----------+---------------+-----------------------------------------------------------------------+
150| JP19      | BLE_LDO       | Connect/Disconnect BLE_LDO power                                      |
151+-----------+---------------+-----------------------------------------------------------------------+
152| JP20      | VREF          | Select VREF power source VDDIO/VDDIOH                                 |
153+-----------+---------------+-----------------------------------------------------------------------+
154| JP21      | I2C0_PU       | Select I2C0_PU power source VDDIO/VDDIOH                              |
155+-----------+---------------+-----------------------------------------------------------------------+
156| JP22      | I2C1_PU       | Select I2C1_PU power source VDDIO/VDDIOH                              |
157+-----------+---------------+-----------------------------------------------------------------------+
158| JP23      | BOARD RESET   | Connect/Disconnect RV JTAG NRESET from the BOARD RESET circuitry      |
159+-----------+---------------+-----------------------------------------------------------------------+
160
161Programming and Debugging
162*************************
163
164Flashing
165========
166
167The MAX32655 MCU can be flashed by connecting an external debug probe to the
168SWD port. SWD debug can be accessed through the Cortex 10-pin connector, JH3.
169Logic levels are fixed to VDDIO (1.8V).
170
171Once the debug probe is connected to your host computer, then you can simply run the
172``west flash`` command to write a firmware image into flash.
173
174.. note::
175
176   This board uses OpenOCD as the default debug interface. You can also use
177   a Segger J-Link with Segger's native tooling by overriding the runner,
178   appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
179   be connected to the standard 2*5 pin debug connector (JW3) using an
180   appropriate adapter board and cable.
181
182Debugging
183=========
184
185Please refer to the `Flashing`_ section and run the ``west debug`` command
186instead of ``west flash``.
187
188References
189**********
190
191- `MAX32655EVKIT web page`_
192
193.. _MAX32655EVKIT web page:
194   https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32655evkit.html#eb-overview
195