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Searched refs:USART1_SEL (Results 1 – 23 of 23) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32l0_clock.h42 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32f0_clock.h42 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CFGR3_REG) macro
Dstm32c0_clock.h43 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32wb_clock.h52 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32wl_clock.h49 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32u0_clock.h47 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32f3_clock.h47 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CFGR3_REG) macro
Dstm32g4_clock.h51 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32g0_clock.h47 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32wba_clock.h57 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR1_REG) macro
Dstm32l4_clock.h52 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR_REG) macro
Dstm32f7_clock.h73 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, DCKCFGR2_REG) macro
Dstm32h7rs_clock.h92 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 0, D3CCIPR_REG) macro
Dstm32u5_clock.h68 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR1_REG) macro
Dstm32h5_clock.h69 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 0, CCIPR1_REG) macro
Dstm32n6_clock.h140 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 0, CCIPR13_REG) macro
/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/boards/
Dstm32l562e_dk.overlay44 <&rcc STM32_SRC_HSI USART1_SEL(2)>;
Db_u585i_iot02a.overlay18 <&rcc STM32_SRC_HSI16 USART1_SEL(2)>;
Dnucleo_wb55rg.overlay19 <&rcc STM32_SRC_HSI USART1_SEL(2)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/boards/
Dclear_clocks.overlay20 <&rcc STM32_SRC_CSI USART1_SEL(4)>;
/Zephyr-latest/boards/st/stm32n6570_dk/
Dstm32n6570_dk_common.dtsi144 <&rcc STM32_SRC_CKPER USART1_SEL(1)>;
/Zephyr-latest/boards/st/nucleo_n657x0_q/
Dnucleo_n657x0_q_common.dtsi162 <&rcc STM32_SRC_CKPER USART1_SEL(1)>;
/Zephyr-latest/boards/st/nucleo_wba55cg/
Dnucleo_wba55cg.dts127 <&rcc STM32_SRC_HSI16 USART1_SEL(2)>;