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Searched refs:SPI_NOR_CMD_RDSR (Results 1 – 12 of 12) sorted by relevance

/Zephyr-latest/modules/nrf_wifi/bus/
Dspi_nor.h25 #define SPI_NOR_CMD_RDSR 0x05 /* Read status register */ macro
Dqspi_if.c641 .op_code = SPI_NOR_CMD_RDSR, in qspi_rdsr()
/Zephyr-latest/drivers/flash/
Dspi_nor.h20 #define SPI_NOR_CMD_RDSR 0x05 /* Read status register */ macro
Dflash_mcux_flexspi_nor.c141 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR,
527 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_quad_enable()
541 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_quad_enable()
774 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_config_flash()
1029 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_check_jedec()
1060 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_check_jedec()
1091 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_check_jedec()
1128 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_RDSR, in flash_flexspi_nor_check_jedec()
Dflash_npcx_fiu_nor.c149 ret = flash_npcx_uma_read(dev, SPI_NOR_CMD_RDSR, &reg, sizeof(reg)); in flash_npcx_nor_wait_until_ready()
163 int ret = flash_npcx_uma_read(dev, SPI_NOR_CMD_RDSR, sts_reg, 1); in flash_npcx_nor_read_status_regs()
Dflash_stm32_xspi.c422 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_xspi_mem_erased()
473 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_xspi_mem_ready()
538 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_xspi_write_enable()
1616 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_xspi_read_status_register()
Dflash_stm32_ospi.c573 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_ospi_mem_erased()
622 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_ospi_mem_ready()
684 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_ospi_write_enable()
1779 s_command.Instruction = SPI_NOR_CMD_RDSR; in stm32_ospi_read_status_register()
Dflash_stm32_qspi.c559 .Instruction = SPI_NOR_CMD_RDSR, in qspi_wait_until_ready()
992 cmd.Instruction = SPI_NOR_CMD_RDSR; in qspi_read_status_register()
Dspi_nor.c480 ret = spi_nor_cmd_read(dev, SPI_NOR_CMD_RDSR, &reg, sizeof(reg)); in spi_nor_wait_until_ready()
614 int ret = spi_nor_cmd_read(dev, SPI_NOR_CMD_RDSR, &reg, sizeof(reg)); in spi_nor_rdsr()
Dflash_mspi_atxp032.c371 ret = flash_mspi_atxp032_command_read(flash, SPI_NOR_CMD_RDSR, 0, 0, rx_dummy, in flash_mspi_atxp032_busy_wait()
Dflash_nxp_s32_qspi_nor.c151 QSPI_LUT_OP(QSPI_IP_LUT_INSTR_CMD, QSPI_IP_LUT_PADS_1, SPI_NOR_CMD_RDSR),
Dnrf_qspi_nor.c462 uint8_t opcode = SPI_NOR_CMD_RDSR; in qspi_rdsr()