Searched refs:MCO1_PRE (Results 1 – 16 of 16) sorted by relevance
| /Zephyr-latest/samples/boards/st/mco/boards/ |
| D | nucleo_u5a5zj_q.overlay | 14 prescaler = <MCO1_PRE(MCO_PRE_DIV_2)>;
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| D | nucleo_f429zi.overlay | 19 prescaler = <MCO1_PRE(MCO_PRE_DIV_2)>;
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| D | stm32f746g_disco.overlay | 18 prescaler = <MCO1_PRE(MCO_PRE_DIV_2)>;
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| D | nucleo_f411re.overlay | 18 prescaler = <MCO1_PRE(MCO_PRE_DIV_2)>;
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| D | nucleo_f446ze.overlay | 18 prescaler = <MCO1_PRE(MCO_PRE_DIV_1)>;
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| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | stm32f0_clock.h | 81 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR1_REG) macro
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| D | stm32f4_clock.h | 83 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 24, CFGR_REG) macro
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| D | stm32c0_clock.h | 80 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR1_REG) macro
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| D | stm32f3_clock.h | 73 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR_REG) macro
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| D | stm32f7_clock.h | 82 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 24, CFGR_REG) macro
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| D | stm32l4_clock.h | 110 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR_REG) macro
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| D | stm32h7rs_clock.h | 136 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0xF, 18, CFGR_REG) macro
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| D | stm32h7_clock.h | 140 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 18, CFGR_REG) macro
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| D | stm32u5_clock.h | 140 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR1_REG) macro
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| D | stm32h5_clock.h | 155 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0xF, 18, CFGR1_REG) macro
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| /Zephyr-latest/boards/shields/weact_ov2640_cam_module/boards/ |
| D | mini_stm32h743.overlay | 35 prescaler = <MCO1_PRE(MCO1_PRE_DIV_4)>;
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