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Searched refs:GD32_RESET_TIMER8 (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32l23x.h66 #define GD32_RESET_TIMER8 GD32_RESET_CONFIG(APB2RST, 11U) macro
Dgd32e10x.h42 #define GD32_RESET_TIMER8 GD32_RESET_CONFIG(APB2RST, 19U) macro
Dgd32f403.h45 #define GD32_RESET_TIMER8 GD32_RESET_CONFIG(APB2RST, 19U) macro
Dgd32e50x.h45 #define GD32_RESET_TIMER8 GD32_RESET_CONFIG(APB2RST, 19U) macro
Dgd32f4xx.h102 #define GD32_RESET_TIMER8 GD32_RESET_CONFIG(APB2RST, 16U) macro
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e507xe.dtsi36 resets = <&rctl GD32_RESET_TIMER8>;
/Zephyr-latest/dts/arm/gd/gd32e10x/
Dgd32e10x.dtsi372 resets = <&rctl GD32_RESET_TIMER8>;
/Zephyr-latest/dts/arm/gd/gd32f403/
Dgd32f403.dtsi396 resets = <&rctl GD32_RESET_TIMER8>;
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f4xx.dtsi524 resets = <&rctl GD32_RESET_TIMER8>;