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Searched refs:GD32_RESET_TIMER11 (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32l23x.h45 #define GD32_RESET_TIMER11 GD32_RESET_CONFIG(APB1RST, 8U) macro
Dgd32e10x.h53 #define GD32_RESET_TIMER11 GD32_RESET_CONFIG(APB1RST, 6U) macro
Dgd32f403.h54 #define GD32_RESET_TIMER11 GD32_RESET_CONFIG(APB1RST, 6U) macro
Dgd32e50x.h59 #define GD32_RESET_TIMER11 GD32_RESET_CONFIG(APB1RST, 6U) macro
Dgd32f4xx.h69 #define GD32_RESET_TIMER11 GD32_RESET_CONFIG(APB1RST, 6U) macro
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e507xe.dtsi87 resets = <&rctl GD32_RESET_TIMER11>;
/Zephyr-latest/dts/arm/gd/gd32e10x/
Dgd32e10x.dtsi423 resets = <&rctl GD32_RESET_TIMER11>;
/Zephyr-latest/dts/arm/gd/gd32f403/
Dgd32f403.dtsi447 resets = <&rctl GD32_RESET_TIMER11>;
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f4xx.dtsi575 resets = <&rctl GD32_RESET_TIMER11>;