Home
last modified time | relevance | path

Searched refs:GD32_RESET_TIMER10 (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32e10x.h44 #define GD32_RESET_TIMER10 GD32_RESET_CONFIG(APB2RST, 21U) macro
Dgd32f403.h47 #define GD32_RESET_TIMER10 GD32_RESET_CONFIG(APB2RST, 21U) macro
Dgd32e50x.h47 #define GD32_RESET_TIMER10 GD32_RESET_CONFIG(APB2RST, 21U) macro
Dgd32f4xx.h104 #define GD32_RESET_TIMER10 GD32_RESET_CONFIG(APB2RST, 18U) macro
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e507xe.dtsi70 resets = <&rctl GD32_RESET_TIMER10>;
/Zephyr-latest/dts/arm/gd/gd32e10x/
Dgd32e10x.dtsi406 resets = <&rctl GD32_RESET_TIMER10>;
/Zephyr-latest/dts/arm/gd/gd32f403/
Dgd32f403.dtsi430 resets = <&rctl GD32_RESET_TIMER10>;
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f4xx.dtsi558 resets = <&rctl GD32_RESET_TIMER10>;