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Searched refs:CFGR1_REG (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32c0_clock.h67 #define CFGR1_REG 0x08 macro
79 #define MCO1_SEL(val) STM32_MCO_CFGR(val, 0x7, 24, CFGR1_REG)
80 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR1_REG)
81 #define MCO2_SEL(val) STM32_MCO_CFGR(val, 0x7, 16, CFGR1_REG)
82 #define MCO2_PRE(val) STM32_MCO_CFGR(val, 0x7, 20, CFGR1_REG)
Dstm32f0_clock.h62 #define CFGR1_REG 0x04 macro
80 #define MCO1_SEL(val) STM32_MCO_CFGR(val, 0xF, 24, CFGR1_REG)
81 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR1_REG)
Dstm32f1_clock.h60 #define CFGR1_REG 0x04 macro
74 #define MCO1_SEL(val) STM32_MCO_CFGR(val, 0x7, 24, CFGR1_REG)
Dstm32h5_clock.h93 #define CFGR1_REG 0x1C macro
154 #define MCO1_SEL(val) STM32_MCO_CFGR(val, 0x7, 22, CFGR1_REG)
155 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0xF, 18, CFGR1_REG)
156 #define MCO2_SEL(val) STM32_MCO_CFGR(val, 0x7, 25, CFGR1_REG)
157 #define MCO2_PRE(val) STM32_MCO_CFGR(val, 0xF, 29, CFGR1_REG)
Dstm32f10x_clock.h22 #define MCO1_SEL(val) STM32_MCO_CFGR(val, 0xF, 24, CFGR1_REG)
Dstm32u5_clock.h92 #define CFGR1_REG 0x1C macro
139 #define MCO1_SEL(val) STM32_MCO_CFGR(val, 0xF, 24, CFGR1_REG)
140 #define MCO1_PRE(val) STM32_MCO_CFGR(val, 0x7, 28, CFGR1_REG)