Searched refs:CCR (Results 1 – 16 of 16) sorted by relevance
| /Zephyr-latest/soc/infineon/cat3/xmc4xxx/ |
| D | soc.c | 26 SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk; in soc_reset_hook()
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| /Zephyr-latest/arch/arm/include/cortex_m/ |
| D | stack.h | 62 SCB->CCR |= SCB_CCR_STKALIGN_Msk; in z_arm_interrupt_stack_setup()
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| /Zephyr-latest/boards/nxp/frdm_mcxn947/ |
| D | board.c | 64 CACHE64_CTRL0->CCR = CACHE64_CTRL_CCR_INVW1_MASK | CACHE64_CTRL_CCR_INVW0_MASK; in enable_cache64()
65 CACHE64_CTRL0->CCR |= CACHE64_CTRL_CCR_GO_MASK; in enable_cache64()
67 while ((CACHE64_CTRL0->CCR & CACHE64_CTRL_CCR_GO_MASK) != 0U) { in enable_cache64()
70 CACHE64_CTRL0->CCR = (CACHE64_CTRL_CCR_ENWRBUF_MASK | CACHE64_CTRL_CCR_ENCACHE_MASK); in enable_cache64()
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | scb.c | 123 if (SCB->CCR & SCB_CCR_DC_Msk) { in z_arm_init_arch_hw_at_boot()
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| D | fault.c | 666 SCB->CCR |= SCB_CCR_BFHFNMIGN_Msk; in z_arm_is_synchronous_svc()
672 SCB->CCR &= ~SCB_CCR_BFHFNMIGN_Msk; in z_arm_is_synchronous_svc()
1121 SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
1141 SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;
1144 SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
1146 SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;
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| /Zephyr-latest/drivers/dma/ |
| D | dma_pl330.h | 118 CCR, enumerator
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| D | dma_pl330.c | 184 CCR, ccr); in dma_pl330_setup_ch()
240 CCR, ccr); in dma_pl330_setup_ch()
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| /Zephyr-latest/tests/arch/arm/arm_thread_swap/src/ |
| D | arm_syscalls.c | 228 SCB->CCR |= SCB_CCR_USERSETMPEND_Msk; in ZTEST()
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| /Zephyr-latest/drivers/flash/ |
| D | flash_stm32h7x.c | 533 if (!(SCB->CCR & SCB_CCR_DC_Msk)) {
645 SCB->CCR |= SCB_CCR_BFHFNMIGN_Msk;
652 SCB->CCR &= ~SCB_CCR_BFHFNMIGN_Msk;
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| D | flash_stm32_qspi.c | 226 LOG_DBG("CCR 0x%x", dev_cfg->regs->CCR); in qspi_send_cmd()
303 LOG_DBG("CCR 0x%x", dev_cfg->regs->CCR); in qspi_write_access()
470 return READ_BIT(dev_data->hqspi.Instance->CCR, QUADSPI_CCR_FMODE) == QUADSPI_CCR_FMODE; in stm32_qspi_is_memory_mapped()
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| D | flash_stm32_xspi.c | 85 LOG_DBG("CCR 0x%x", dev_data->hxspi.Instance->CCR); in xspi_send_cmd()
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| D | flash_stm32_ospi.c | 214 LOG_DBG("CCR 0x%x", dev_cfg->regs->CCR); in ospi_send_cmd()
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| /Zephyr-latest/arch/arm/core/mpu/ |
| D | arm_mpu.c | 444 if (SCB->CCR & SCB_CCR_DC_Msk) { in z_arm_mpu_init()
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| /Zephyr-latest/soc/nxp/imxrt/imxrt10xx/ |
| D | lpm_rt1064.c | 169 if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) { in flexspi_exit_critical()
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_ll_stm32_v1.c | 96 ccr = LL_I2C_ReadReg(i2c, CCR); in stm32_i2c_reset()
114 LL_I2C_WriteReg(i2c, CCR, ccr); in stm32_i2c_reset()
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_sam_gmac.c | 67 dcache_enabled = (SCB->CCR & SCB_CCR_DC_Msk); in dcache_is_enabled()
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