| /Zephyr-latest/drivers/sensor/ti/fdc2x1x/ |
| D | fdc2x1x.h | 61 #define FDC2X1X_REG_READ(x) (((x & 0xFF) << 1) | FDC2X1X_READ) argument
62 #define FDC2X1X_REG_WRITE(x) ((x & 0xFF) << 1) argument
63 #define FDC2X1X_TO_I2C_REG(x) ((x) >> 1) argument
67 #define FDC2X1X_CLK_DIV_CHX_FIN_SEL_SET(x) (((x) & 0x3) << 12) argument
68 #define FDC2X1X_CLK_DIV_CHX_FIN_SEL_GET(x) (((x) >> 12) & 0x3) argument
70 #define FDC2X1X_CLK_DIV_CHX_FREF_DIV_SET(x) ((x) & 0x1FF) argument
71 #define FDC2X1X_CLK_DIV_CHX_FREF_DIV_GET(x) (((x) >> 0) & 0x1FF) argument
74 #define FDC2X1X_STATUS_ERR_CHAN(x) (((x) >> 14) & 0x3) argument
75 #define FDC2X1X_STATUS_ERR_WD(x) (((x) >> 11) & 0x1) argument
76 #define FDC2X1X_STATUS_ERR_AHW(x) (((x) >> 10) & 0x1) argument
[all …]
|
| /Zephyr-latest/soc/sifive/sifive_freedom/fe300/ |
| D | prci.h | 25 #define ROSC_DIV(x) (((x) & 0x2F) << 0) argument
26 #define ROSC_TRIM(x) (((x) & 0x1F) << 16) argument
27 #define ROSC_EN(x) (((x) & 0x1) << 30) argument
28 #define ROSC_RDY(x) (((x) & 0x1) << 31) argument
30 #define XOSC_EN(x) (((x) & 0x1) << 30) argument
31 #define XOSC_RDY(x) (((x) & 0x1) << 31) argument
33 #define PLL_R(x) (((x) & 0x7) << 0) argument
35 #define PLL_F(x) (((x) & 0x3F) << 4) argument
36 #define PLL_Q(x) (((x) & 0x3) << 10) argument
37 #define PLL_SEL(x) (((x) & 0x1) << 16) argument
[all …]
|
| /Zephyr-latest/drivers/flash/ |
| D | flash_cadence_qspi_nor_ll.h | 24 #define CAD_QSPI_BANK_ADDR(x) ((x) >> 24) argument
31 #define CAD_QSPI_CFG_BAUDDIV(x) FIELD_PREP(0x780000, x) argument
33 #define CAD_QSPI_CFG_CS(x) (((x) << 11)) argument
41 #define CAD_QSPI_DELAY_CSSOT(x) (FIELD_GET(0xff, (x)) << 0) argument
42 #define CAD_QSPI_DELAY_CSEOT(x) (FIELD_GET(0xff, (x)) << 8) argument
43 #define CAD_QSPI_DELAY_CSDADS(x) (FIELD_GET(0xff, (x)) << 16) argument
44 #define CAD_QSPI_DELAY_CSDA(x) (FIELD_GET(0xff, (x)) << 24) argument
47 #define CAD_QSPI_DEVSZ_ADDR_BYTES(x) ((x) << 0) argument
48 #define CAD_QSPI_DEVSZ_BYTES_PER_PAGE(x) ((x) << 4) argument
49 #define CAD_QSPI_DEVSZ_BYTES_PER_BLOCK(x) ((x) << 16) argument
[all …]
|
| D | flash_cadence_nand_ll.h | 18 #define CNF_GET_INIT_COMP(x) (FIELD_GET(BIT(9), x)) argument
19 #define CNF_GET_INIT_FAIL(x) (FIELD_GET(BIT(10), x)) argument
20 #define CNF_GET_CTRL_BUSY(x) (FIELD_GET(BIT(8), x)) argument
21 #define GET_PAGE_SIZE(x) (FIELD_GET(GENMASK(15, 0), x)) argument
22 #define GET_PAGES_PER_BLOCK(x) (FIELD_GET(GENMASK(15, 0), x)) argument
23 #define GET_SPARE_SIZE(x) (FIELD_GET(GENMASK(31, 16), x)) argument
24 #define ONFI_TIMING_MODE_SDR(x) (FIELD_GET(GENMASK(15, 0), x)) argument
25 #define ONFI_TIMING_MODE_NVDDR(x) (FIELD_GET(GENMASK(31, 15), x)) argument
28 #define CNF_GET_NLUNS(x) (FIELD_GET(GENMASK(7, 0), x)) argument
29 #define CNF_GET_DEV_TYPE(x) (FIELD_GET(GENMASK(31, 30), x)) argument
[all …]
|
| /Zephyr-latest/drivers/dai/intel/ssp/ |
| D | ssp_regs_v3.h | 32 #define PCMSyCM_OFFSET(x) 0x16 + 0x4*(x) argument
38 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1) argument
39 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1) argument
48 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x) argument
53 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1) argument
54 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1) argument
96 #define SSPSP_SCMODE(x) DAI_INTEL_SSP_SET_BITS(1, 0, x) argument
97 #define SSPSP_SFRMP(x) DAI_INTEL_SSP_SET_BIT(2, x) argument
98 #define SSPSP_STRTDLY(x) DAI_INTEL_SSP_SET_BITS(6, 4, x) argument
99 #define SSPSP_DMYSTRT(x) DAI_INTEL_SSP_SET_BITS(8, 7, x) argument
[all …]
|
| D | ssp_regs_v1.h | 30 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1) argument
31 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1) argument
40 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x) argument
45 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1) argument
46 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1) argument
58 #define SSCR1_TFT(x) DAI_INTEL_SSP_SET_BITS(9, 6, (x) - 1) argument
60 #define SSCR1_RFT(x) DAI_INTEL_SSP_SET_BITS(13, 10, (x) - 1) argument
100 #define SSPSP_SCMODE(x) DAI_INTEL_SSP_SET_BITS(1, 0, x) argument
101 #define SSPSP_SFRMP(x) DAI_INTEL_SSP_SET_BIT(2, x) argument
103 #define SSPSP_STRTDLY(x) DAI_INTEL_SSP_SET_BITS(6, 4, x) argument
[all …]
|
| D | ssp_regs_v2.h | 31 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1) argument
32 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1) argument
41 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x) argument
46 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1) argument
47 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1) argument
59 #define SSCR1_TFT(x) DAI_INTEL_SSP_SET_BITS(9, 6, (x) - 1) argument
61 #define SSCR1_RFT(x) DAI_INTEL_SSP_SET_BITS(13, 10, (x) - 1) argument
101 #define SSPSP_SCMODE(x) DAI_INTEL_SSP_SET_BITS(1, 0, x) argument
102 #define SSPSP_SFRMP(x) DAI_INTEL_SSP_SET_BIT(2, x) argument
104 #define SSPSP_STRTDLY(x) DAI_INTEL_SSP_SET_BITS(6, 4, x) argument
[all …]
|
| /Zephyr-latest/drivers/sensor/ti/tmp108/ |
| D | tmp108.h | 49 #define TI_TMP108_MODE_SHUTDOWN(x) 0 argument
50 #define TI_TMP108_MODE_ONE_SHOT(x) TI_TMP108_CONF_M0(x) argument
51 #define TI_TMP108_MODE_CONTINUOUS(x) TI_TMP108_CONF_M1(x) argument
52 #define TI_TMP108_MODE_MASK(x) ~(TI_TMP108_CONF_M0(x) | TI_TMP108_CONF_M1(x)) argument
54 #define TI_TMP108_FREQ_4_SECS(x) 0 argument
55 #define TI_TMP108_FREQ_1_HZ(x) TI_TMP108_GET_CONF(x, CONF_CR0) argument
56 #define TI_TMP108_FREQ_4_HZ(x) TI_TMP108_GET_CONF(x, CONF_CR1) argument
57 #define TI_TMP108_FREQ_16_HZ(x) (TI_TMP108_GET_CONF(x, CONF_CR1) | \ argument
58 TI_TMP108_GET_CONF(x, CONF_CR0))
59 #define TI_TMP108_FREQ_MASK(x) ~(TI_TMP108_GET_CONF(x, CONF_CR1) | \ argument
[all …]
|
| /Zephyr-latest/include/zephyr/toolchain/ |
| D | xcc.h | 52 #define __INT8_C(x) x argument
56 #define INT8_C(x) __INT8_C(x) argument
60 #define __UINT8_C(x) x ## U argument
64 #define UINT8_C(x) __UINT8_C(x) argument
68 #define __INT16_C(x) x argument
72 #define INT16_C(x) __INT16_C(x) argument
76 #define __UINT16_C(x) x ## U argument
80 #define UINT16_C(x) __UINT16_C(x) argument
84 #define __INT32_C(x) x argument
88 #define INT32_C(x) __INT32_C(x) argument
[all …]
|
| D | llvm.h | 60 #define __INT64_C(x) int_c(x, __int_least64_c_suffix__) argument
61 #define __UINT64_C(x) uint_c(x, __int_least64_c_suffix__) argument
63 #define __INT64_C(x) x argument
64 #define __UINT64_C(x) x ## U argument
81 #define __INT32_C(x) int_c(x, __int_least32_c_suffix__) argument
82 #define __UINT32_C(x) uint_c(x, __int_least32_c_suffix__) argument
84 #define __INT32_C(x) x argument
85 #define __UINT32_C(x) x ## U argument
102 #define __INT16_C(x) int_c(x, __int_least16_c_suffix__) argument
103 #define __UINT16_C(x) uint_c(x, __int_least16_c_suffix__) argument
[all …]
|
| /Zephyr-latest/drivers/sensor/adi/adxl372/ |
| D | adxl372.h | 97 #define ADXL372_REG_READ(x) (((x & 0xFF) << 1) | ADXL372_READ) argument
98 #define ADXL372_REG_WRITE(x) ((x & 0xFF) << 1) argument
99 #define ADXL372_TO_I2C_REG(x) ((x) >> 1) argument
103 #define ADXL372_POWER_CTL_INSTANT_ON_TH_MODE(x) (((x) & 0x1) << 5) argument
105 #define ADXL372_POWER_CTL_FIL_SETTLE_MODE(x) (((x) & 0x1) << 4) argument
107 #define ADXL372_POWER_CTL_LPF_DIS_MODE(x) (((x) & 0x1) << 3) argument
109 #define ADXL372_POWER_CTL_HPF_DIS_MODE(x) (((x) & 0x1) << 2) argument
111 #define ADXL372_POWER_CTL_MODE(x) (((x) & 0x3) << 0) argument
115 #define ADXL372_MEASURE_AUTOSLEEP_MODE(x) (((x) & 0x1) << 6) argument
117 #define ADXL372_MEASURE_LINKLOOP_MODE(x) (((x) & 0x3) << 4) argument
[all …]
|
| /Zephyr-latest/soc/nxp/lpc/lpc11u6x/ |
| D | soc.h | 40 #define IOCON_PIO_FUNC(x) (((x) & 0x7)) argument
42 #define IOCON_PIO_MODE(x) (((x) & 0x3) << 3) argument
44 #define IOCON_PIO_HYS(x) (((x) & 0x1) << 5) argument
46 #define IOCON_PIO_INVERT(x) (((x) & 0x1) << 2) argument
48 #define IOCON_PIO_OD(x) (((x) & 0x1) << 10) argument
50 #define IOCON_PIO_SMODE(x) (((x) & 0x3) << 11) argument
52 #define IOCON_PIO_CLKDIV(x) (((x) & 0x7) << 13) argument
72 #define IOCON_PIO_ADMODE(x) (((x) & 0x1) << 7) argument
74 #define IOCON_PIO_FILTER(x) (((x) & 0x1) << 8) argument
91 #define IOCON_PIO_I2CMODE(x) (((x) & 0x3) << 8) argument
|
| /Zephyr-latest/include/zephyr/llext/ |
| D | symbol.h | 93 #define Z_LL_EXTENSION_SYMBOL(x) \ argument
96 __llext_sym_ ## x = { \
97 .name = STRINGIFY(x), .addr = (const void *)&x, \
101 #define Z_LL_EXTENSION_SYMBOL(x) argument
116 #define LL_EXTENSION_SYMBOL(x) Z_LL_EXTENSION_SYMBOL(x) argument
121 #define Z_EXPORT_SYMBOL(x) Z_LL_EXTENSION_SYMBOL(x) argument
124 #define Z_EXPORT_SYMBOL(x) \ argument
126 __llext_sym_name_ ## x[] = STRINGIFY(x); \
128 __llext_sym_ ## x) = { \
129 .name = __llext_sym_name_ ## x, .addr = (const void *)&x, \
[all …]
|
| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_agilex5_ll.h | 30 #define CLKCTRL(x) (CLKCTRL_BASE_ADDR + CLKCTRL_##_reg) argument
112 #define CLKCTRL_STAT_BUSY(x) (((x) & 0x00000001U) >> 0) argument
113 #define CLKCTRL_STAT_MAINPLLLOCKED(x) (((x) & 0x00000100U) >> 8) argument
114 #define CLKCTRL_STAT_PERPLLLOCKED(x) (((x) & 0x00010000U) >> 16) argument
117 #define CLKCTRL_MAINPLL_L4SPDIV(x) (((x) >> 16) & 0x3) argument
128 #define GET_CLKCTRL_CLKSRC(x) (((x) & CLKCTRL_CLKSRC_MASK) >> \ argument
132 #define CLKCTRL_PSRC(x) (((x) & 0x00030000U) >> 16) argument
140 #define CLKCTRL_PLLM_MDIV(x) ((x) & 0x000003FFU) argument
144 #define CLKCTRL_PLLGLOB_REFCLKDIV(x) (((x) & 0x00003F00) >> 8) argument
145 #define CLKCTRL_PLLGLOB_AREFCLKDIV(x) (((x) & 0x00000F00) >> 8) argument
[all …]
|
| /Zephyr-latest/samples/philosophers/src/ |
| D | phil_obj_abstract.h | 53 #define fork_init(x) k_sem_init(x, 1, 1) argument
55 #define take(x) k_sem_take(x, K_FOREVER) argument
56 #define drop(x) k_sem_give(x) argument
69 #define fork_init(x) k_mutex_init(x) argument
71 #define take(x) k_mutex_lock(x, K_FOREVER) argument
72 #define drop(x) k_mutex_unlock(x) argument
83 #define fork_init(x) do { \ argument
84 k_stack_init(x, (stack_data_t *)((x) + 1), 1); \
85 k_stack_push(x, MAGIC); \
88 #define take(x) do { \ argument
[all …]
|
| /Zephyr-latest/soc/sifive/sifive_freedom/fu500/ |
| D | prci.h | 27 #define PLL_R(x) (((x) & 0x3f) << 0) argument
28 #define PLL_F(x) (((x) & 0x1ff) << 6) argument
29 #define PLL_Q(x) (((x) & 0x7) << 15) argument
30 #define PLL_RANGE(x) (((x) & 0x7) << 18) argument
31 #define PLL_BYPASS(x) (((x) & 0x1) << 24) argument
32 #define PLL_FSE(x) (((x) & 0x1) << 25) argument
33 #define PLL_LOCK(x) (((x) & 0x1) << 31) argument
40 #define CORECLKSEL_CORECLKSEL(x) (((x) & 0x1) << 0) argument
|
| /Zephyr-latest/soc/sifive/sifive_freedom/fu700/ |
| D | prci.h | 33 #define PLL_R(x) (((x) & 0x3f) << 0) argument
34 #define PLL_F(x) (((x) & 0x1ff) << 6) argument
35 #define PLL_Q(x) (((x) & 0x7) << 15) argument
36 #define PLL_RANGE(x) (((x) & 0x7) << 18) argument
37 #define PLL_BYPASS(x) (((x) & 0x1) << 24) argument
38 #define PLL_FSE(x) (((x) & 0x1) << 25) argument
39 #define PLL_LOCK(x) (((x) & 0x1) << 31) argument
53 #define OUTDIV_PLLCKE(x) (((x) & 0x1) << 31) argument
58 #define CLKSEL_SEL(x) (((x) & 0x1) << 0) argument
71 #define COREPLLSEL_SEL(x) (((x) & 0x1) << 0) argument
|
| /Zephyr-latest/drivers/sdhc/ |
| D | sdhc_cdns_ll.h | 15 #define CDNS_HRS09_EXT_RD_MODE(x) ((x) << 2) argument
16 #define CDNS_HRS09_EXTENDED_WR(x) ((x) << 3) argument
17 #define CDNS_HRS09_RDCMD_EN(x) ((x) << 15) argument
18 #define CDNS_HRS09_RDDATA_EN(x) ((x) << 16) argument
122 #define CP_USE_EXT_LPBK_DQS(x) (x << 22) argument
123 #define CP_USE_LPBK_DQS(x) (x << 21) argument
124 #define CP_USE_PHONY_DQS(x) (x << 20) argument
125 #define CP_USE_PHONY_DQS_CMD(x) (x << 19) argument
128 #define CP_SYNC_METHOD(x) ((x) << 31) argument
129 #define CP_SW_HALF_CYCLE_SHIFT(x) ((x) << 28) argument
[all …]
|
| /Zephyr-latest/lib/libc/minimal/include/ |
| D | stdint.h | 127 #define __INT8_C(x) x argument
131 #define INT8_C(x) __INT8_C(x) argument
135 #define __UINT8_C(x) x ## U argument
139 #define UINT8_C(x) __UINT8_C(x) argument
143 #define __INT16_C(x) x argument
147 #define INT16_C(x) __INT16_C(x) argument
151 #define __UINT16_C(x) x ## U argument
155 #define UINT16_C(x) __UINT16_C(x) argument
159 #define __INT32_C(x) x argument
163 #define INT32_C(x) __INT32_C(x) argument
[all …]
|
| /Zephyr-latest/include/zephyr/drivers/clock_control/ |
| D | clock_agilex_ll.h | 80 #define CLKMGR_STAT_BUSY(x) (((x) & 0x00000001) >> 0) argument
81 #define CLKMGR_STAT_MAINPLLLOCKED(x) (((x) & 0x00000100) >> 8) argument
82 #define CLKMGR_STAT_PERPLLLOCKED(x) (((x) & 0x00010000) >> 16) argument
93 #define CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET(x) (((x) << 0) & 0x0000ffff) argument
99 #define CLKMGR_PSRC(x) (((x) & 0x00030000) >> 16) argument
107 #define CLKMGR_PLLM_MDIV(x) ((x) & 0x000003ff) argument
111 #define CLKMGR_PLLGLOB_REFCLKDIV(x) (((x) & 0x00003f00) >> 8) argument
112 #define CLKMGR_PLLGLOB_AREFCLKDIV(x) (((x) & 0x00000f00) >> 8) argument
113 #define CLKMGR_PLLGLOB_DREFCLKDIV(x) (((x) & 0x00003000) >> 12) argument
115 #define CLKMGR_VCOCALIB_HSCNT_SET(x) (((x) << 0) & 0x000003ff) argument
[all …]
|
| /Zephyr-latest/scripts/coccinelle/ |
| D | noderef.cocci | 17 expression *x;
24 x = <+... sizeof(
25 - x
26 + *x
29 f(...,(T)(x),...,sizeof(
30 - x
31 + *x
35 - x
36 + *x
37 ),...,(T)(x),...)
[all …]
|
| /Zephyr-latest/include/zephyr/dt-bindings/pwm/ |
| D | pwm.h | 24 #define PWM_NSEC(x) (x) argument
26 #define PWM_USEC(x) (PWM_NSEC(x) * 1000UL) argument
28 #define PWM_MSEC(x) (PWM_USEC(x) * 1000UL) argument
30 #define PWM_SEC(x) (PWM_MSEC(x) * 1000UL) argument
32 #define PWM_HZ(x) (PWM_SEC(1UL) / (x)) argument
34 #define PWM_KHZ(x) (PWM_HZ((x) * 1000UL)) argument
|
| /Zephyr-latest/drivers/sensor/adi/adxl345/ |
| D | adxl345.h | 36 #define ADXL345_REG_READ(x) ((x & 0xFF) | ADXL345_READ_CMD) argument
62 #define ADXL345_COMPLEMENT_MASK(x) GENMASK(15, (x)) argument
72 #define ADXL345_STATUS_DOUBLE_TAP(x) (((x) >> 5) & 0x1) argument
73 #define ADXL345_STATUS_SINGLE_TAP(x) (((x) >> 6) & 0x1) argument
74 #define ADXL345_STATUS_DATA_RDY(x) (((x) >> 7) & 0x1) argument
78 #define ADXL345_INT_MAP_OVERRUN_MODE(x) (((x) & 0x1) << 0) argument
80 #define ADXL345_INT_MAP_WATERMARK_MODE(x) (((x) & 0x1) << 1) argument
82 #define ADXL345_INT_MAP_FREE_FALL_MODE(x) (((x) & 0x1) << 2) argument
84 #define ADXL345_INT_MAP_INACT_MODE(x) (((x) & 0x1) << 3) argument
86 #define ADXL345_INT_MAP_ACT_MODE(x) (((x) & 0x1) << 4) argument
[all …]
|
| /Zephyr-latest/include/zephyr/xen/ |
| D | generic.h | 14 #define XEN_PFN_UP(x) (unsigned long)(((x) + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT) argument
15 #define XEN_PFN_DOWN(x) (unsigned long)((x) >> XEN_PAGE_SHIFT) argument
16 #define XEN_PFN_PHYS(x) ((unsigned long)(x) << XEN_PAGE_SHIFT) argument
17 #define XEN_PHYS_PFN(x) (unsigned long)((x) >> XEN_PAGE_SHIFT) argument
19 #define xen_to_phys(x) ((unsigned long) (x)) argument
20 #define xen_to_virt(x) ((void *) (x)) argument
|
| /Zephyr-latest/samples/subsys/portability/cmsis_rtos_v1/philosophers/src/ |
| D | phil_obj_abstract.h | 41 #define fork_init(x) osSemaphoreCreate(osSemaphore(##x), 1) argument
42 #define take(x) osSemaphoreWait(x, osWaitForever) argument
43 #define drop(x) osSemaphoreRelease(x) argument
55 #define fork_init(x) osMutexCreate(osMutex(##x)); argument
56 #define take(x) osMutexWait(x, 0) argument
57 #define drop(x) osMutexRelease(x) argument
|
