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Searched refs:STM32_PLL_SRC_HSE (Results 1 – 17 of 17) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32f0_f3.c57 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in config_pll_sysclock()
68 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in config_pll_sysclock()
117 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllout_frequency()
128 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllout_frequency()
Dclock_stm32g4.c30 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pll_source()
46 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc_frequency()
Dclock_stm32g0_u0.c31 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pll_source()
47 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc_frequency()
Dclock_stm32l4_l5_wb_wl.c38 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pll_source()
56 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc_frequency()
Dclock_stm32l0_l1.c37 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pll_source()
53 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc_frequency()
Dclock_stm32f2_f4_f7.c29 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pll_source()
45 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc_frequency()
Dclock_stm32f1.c100 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in config_pll_sysclock()
Dclock_stm32_ll_wba.c141 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc_frequency()
155 } else if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in get_pllsrc()
391 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in set_up_plls()
Dclock_stm32_ll_u5.c61 } else if ((IS_ENABLED(STM32_PLL_SRC_HSE) && pll_id == PLL1_ID) || in get_pllsrc_frequency()
469 } else if (IS_ENABLED(STM32_PLL_SRC_HSE) && (MHZ(16) < STM32_HSE_FREQ)) { in set_epod_booster()
532 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in set_up_plls()
Dclock_stm32_ll_h5.c56 } else if ((IS_ENABLED(STM32_PLL_SRC_HSE) && pll_id == PLL1_ID) || in get_pllsrc_frequency()
451 if (IS_ENABLED(STM32_PLL_SRC_HSE)) { in set_up_plls()
Dclock_stm32_ll_h7.c61 #elif defined(STM32_PLL_SRC_HSE)
817 if (IS_ENABLED(STM32_PLL_SRC_HSE)) {
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32wba_core/src/
Dtest_stm32_clock_configuration.c55 #if STM32_PLL_SRC_HSE in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/
Dtest_stm32_clock_configuration.c60 #if STM32_PLL_SRC_HSE in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core/src/
Dtest_stm32_clock_configuration.c60 #if STM32_PLL_SRC_HSE in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/src/
Dtest_stm32_clock_configuration.c60 #if STM32_PLL_SRC_HSE in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/src/
Dtest_stm32_clock_configuration.c69 #if STM32_PLL_SRC_HSE in ZTEST()
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h272 #define STM32_PLL_SRC_HSE 1 macro