Searched refs:GIC_SPI (Results 1 – 25 of 31) sorted by relevance
12
22 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;30 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;38 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;46 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;54 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;62 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;70 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;78 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;86 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;94 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
125 interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;132 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;139 interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;146 interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;153 interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;160 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;167 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;174 interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;181 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;188 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;[all …]
89 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL 0>;115 interrupt-map = <0x00 0x00 0x00 1 &gic 0 0 GIC_SPI117 0x00 0x00 0x00 2 &gic 0 0 GIC_SPI119 0x00 0x00 0x00 3 &gic 0 0 GIC_SPI121 0x00 0x00 0x00 4 &gic 0 0 GIC_SPI124 0x800 0x00 0x00 1 &gic 0 0 GIC_SPI126 0x800 0x00 0x00 2 &gic 0 0 GIC_SPI128 0x800 0x00 0x00 3 &gic 0 0 GIC_SPI130 0x800 0x00 0x00 4 &gic 0 0 GIC_SPI133 0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI[all …]
38 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL47 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL55 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL57 <GIC_SPI 37 IRQ_TYPE_LEVEL59 <GIC_SPI 38 IRQ_TYPE_LEVEL68 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL70 <GIC_SPI 40 IRQ_TYPE_LEVEL72 <GIC_SPI 41 IRQ_TYPE_LEVEL81 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL83 <GIC_SPI 43 IRQ_TYPE_LEVEL[all …]
56 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL58 <GIC_SPI 23 IRQ_TYPE_LEVEL83 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL85 <GIC_SPI 46 IRQ_TYPE_LEVEL109 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL118 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL127 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL
31 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL71 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL
84 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,85 <GIC_SPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;94 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,95 <GIC_SPI 58 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;104 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,105 <GIC_SPI 60 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;114 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,115 <GIC_SPI 190 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;123 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;133 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;[all …]
50 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;61 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;81 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL83 <GIC_SPI 143 IRQ_TYPE_LEVEL95 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL108 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL121 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL131 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL141 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL
96 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,97 <GIC_SPI 289 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,98 <GIC_SPI 290 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,99 <GIC_SPI 291 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;108 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,109 <GIC_SPI 301 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,110 <GIC_SPI 302 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,111 <GIC_SPI 303 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
63 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;74 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;85 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;96 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;107 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;118 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;129 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
28 0x00 0x00 0x00 1 &gic 0 0 GIC_SPI 108 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY29 0x00 0x00 0x00 2 &gic 0 0 GIC_SPI 109 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY30 0x00 0x00 0x00 3 &gic 0 0 GIC_SPI 110 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY31 0x00 0x00 0x00 4 &gic 0 0 GIC_SPI 111 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
51 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL57 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL63 interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL
65 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL77 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL90 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL
75 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;84 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;93 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;102 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;112 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
39 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;53 interrupts = <GIC_SPI 826 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;60 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;66 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
91 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL107 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL124 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL134 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL144 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL154 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL
105 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;136 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL147 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL158 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL169 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL230 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
103 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;112 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;121 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;130 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;140 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
24 #define GIC_SPI 0x0 macro
15 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL
59 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL77 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL
