1/*
2 * Device Tree Source for the R-Car H3/M3 (R8A77951/R8A77961) SoC
3 *
4 * Copyright (C) 2023 EPAM Systems.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8#include <arm64/armv8-a.dtsi>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
11#include <zephyr/dt-bindings/clock/r8a7795_cpg_mssr.h>
12
13/ {
14	#address-cells = <2>;
15	#size-cells = <2>;
16
17	psci {
18		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
19		method = "smc";
20	};
21
22	arch_timer: timer {
23		compatible = "arm,armv8-timer";
24		interrupt-parent = <&gic>;
25		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
26			     <GIC_PPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
27			     <GIC_PPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
28			     <GIC_PPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
29	};
30
31	gic: interrupt-controller@f1010000 {
32		compatible = "arm,gic-400", "arm,gic-v2", "arm,gic" ;
33		#interrupt-cells = <4>;
34		#address-cells = <0>;
35		interrupt-controller;
36		reg = <0 0xf1010000 0 0x1000>,
37		      <0 0xf1020000 0 0x20000>;
38		status = "okay";
39	};
40
41	soc: soc {
42		compatible = "simple-bus";
43		interrupt-parent = <&gic>;
44
45		#address-cells = <2>;
46		#size-cells = <2>;
47		ranges;
48
49		cpg: clock-controller@e6150000 {
50			reg = <0 0xe6150000 0 0x1000>;
51			#clock-cells = <2>;
52			#power-domain-cells = <0>;
53			#reset-cells = <1>;
54		};
55
56		emmc2: mmc@ee140000 {
57			compatible = "renesas,rcar-mmc";
58			reg = <0 0xee140000 0 0x2000>;
59			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL
60				      IRQ_DEFAULT_PRIORITY>;
61			clocks = <&cpg CPG_MOD 312>;
62			max-frequency = <200000000>;
63			status = "disabled";
64		};
65
66		pfc: pin-controller@e6060000 {
67			compatible = "renesas,rcar-pfc";
68			reg = <0 0xe6060000 0 0x50c>;
69		};
70
71		scif2: serial@e6e88000 {
72			compatible = "renesas,rcar-scif";
73			reg = <0 0xe6e88000 0 0x64>;
74			interrupt-parent = <&gic>;
75			clocks = <&cpg CPG_MOD 310>,
76				 <&cpg CPG_CORE R8A7795_CLK_S3D4>;
77			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL
78				      IRQ_DEFAULT_PRIORITY>;
79			current-speed = <115200>;
80			interrupt-names = "irq_0";
81			status = "disabled";
82		};
83	};
84};
85