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/Zephyr-Core-3.5.0/include/zephyr/devicetree/
Dreset.h121 #define DT_RESET_CELL_BY_IDX(node_id, idx, cell) \ argument
122 DT_PHA_BY_IDX(node_id, resets, idx, cell)
155 #define DT_RESET_CELL_BY_NAME(node_id, name, cell) \ argument
156 DT_PHA_BY_NAME(node_id, resets, name, cell)
165 #define DT_RESET_CELL(node_id, cell) \ argument
166 DT_RESET_CELL_BY_IDX(node_id, 0, cell)
214 #define DT_INST_RESET_CELL_BY_IDX(inst, idx, cell) \ argument
215 DT_RESET_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
226 #define DT_INST_RESET_CELL_BY_NAME(inst, name, cell) \ argument
227 DT_RESET_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
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Dclocks.h207 #define DT_CLOCKS_CELL_BY_IDX(node_id, idx, cell) \ argument
208 DT_PHA_BY_IDX(node_id, clocks, idx, cell)
243 #define DT_CLOCKS_CELL_BY_NAME(node_id, name, cell) \ argument
244 DT_PHA_BY_NAME(node_id, clocks, name, cell)
253 #define DT_CLOCKS_CELL(node_id, cell) DT_CLOCKS_CELL_BY_IDX(node_id, 0, cell) argument
326 #define DT_INST_CLOCKS_CELL_BY_IDX(inst, idx, cell) \ argument
327 DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
338 #define DT_INST_CLOCKS_CELL_BY_NAME(inst, name, cell) \ argument
339 DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
347 #define DT_INST_CLOCKS_CELL(inst, cell) \ argument
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Dpwms.h135 #define DT_PWMS_CELL_BY_IDX(node_id, idx, cell) \ argument
136 DT_PHA_BY_IDX(node_id, pwms, idx, cell)
182 #define DT_PWMS_CELL_BY_NAME(node_id, name, cell) \ argument
183 DT_PHA_BY_NAME(node_id, pwms, name, cell)
192 #define DT_PWMS_CELL(node_id, cell) DT_PWMS_CELL_BY_IDX(node_id, 0, cell) argument
363 #define DT_INST_PWMS_CELL_BY_IDX(inst, idx, cell) \ argument
364 DT_PWMS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
375 #define DT_INST_PWMS_CELL_BY_NAME(inst, name, cell) \ argument
376 DT_PWMS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
384 #define DT_INST_PWMS_CELL(inst, cell) \ argument
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Ddma.h165 #define DT_DMAS_CELL_BY_IDX(node_id, idx, cell) \ argument
166 DT_PHA_BY_IDX(node_id, dmas, idx, cell)
176 #define DT_INST_DMAS_CELL_BY_IDX(inst, idx, cell) \ argument
177 DT_PHA_BY_IDX(DT_DRV_INST(inst), dmas, idx, cell)
220 #define DT_DMAS_CELL_BY_NAME(node_id, name, cell) \ argument
221 DT_PHA_BY_NAME(node_id, dmas, name, cell)
232 #define DT_INST_DMAS_CELL_BY_NAME(inst, name, cell) \ argument
233 DT_DMAS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
/Zephyr-Core-3.5.0/include/zephyr/
Ddevicetree.h1369 #define DT_PHA_BY_IDX(node_id, pha, idx, cell) \ argument
1370 DT_CAT7(node_id, _P_, pha, _IDX_, idx, _VAL_, cell)
1395 #define DT_PHA_BY_IDX_OR(node_id, pha, idx, cell, default_value) \ argument
1396 DT_PROP_OR(node_id, pha##_IDX_##idx##_VAL_##cell, default_value)
1405 #define DT_PHA(node_id, pha, cell) DT_PHA_BY_IDX(node_id, pha, 0, cell) argument
1421 #define DT_PHA_OR(node_id, pha, cell, default_value) \ argument
1422 DT_PHA_BY_IDX_OR(node_id, pha, 0, cell, default_value)
1464 #define DT_PHA_BY_NAME(node_id, pha, name, cell) \ argument
1465 DT_CAT7(node_id, _P_, pha, _NAME_, name, _VAL_, cell)
1488 #define DT_PHA_BY_NAME_OR(node_id, pha, name, cell, default_value) \ argument
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/Zephyr-Core-3.5.0/doc/_doxygen/
Ddoxygen-awesome-zephyr.js10 let cell = titleTable.insertRow(1).insertCell(0);
11 cell.innerHTML = '<div id="projectversion">' + version + '</div>';
/Zephyr-Core-3.5.0/samples/drivers/ethernet/eth_ivshmem/
DREADME.rst5 Communicate with another "cell" in the Jailhouse hypervisor using IVSHMEM Ethernet.
11 another "cell" in the Jailhouse hypervisor. Currently only the qemu_cortex_a53
59 Copy the generated zephyr.bin to the Jailhouse Linux root cell:
65 Jailhouse has a prebuilt Zephyr cell configuration that works for
68 Back in Jailhouse Linux shell, create the Zephyr cell:
72 jailhouse enable /etc/jailhouse/qemu-arm64.cell
74 jailhouse cell create /etc/jailhouse/qemu-arm64-zephyr-demo.cell
83 Load and start the Zephyr cell:
87 jailhouse cell load qemu-arm64-zephyr-demo zephyr.bin --address 0x70000000
88 jailhouse cell start qemu-arm64-zephyr-demo
/Zephyr-Core-3.5.0/include/zephyr/drivers/dma/
Ddma_esp32.h32 #define ESP32_DT_INST_DMA_CELL(n, name, cell) \ argument
34 (DT_INST_DMAS_CELL_BY_NAME(n, name, cell)), \
/Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/
Datmel_sam0_dt.h25 #define ATMEL_SAM0_DT_INST_DMA_CELL(n, name, cell) \ argument
27 (DT_INST_DMAS_CELL_BY_NAME(n, name, cell)), \
/Zephyr-Core-3.5.0/include/zephyr/drivers/misc/ft8xx/
Dft8xx_dl.h216 #define FT8XX_VERTEX2II(x, y, handle, cell) (0x80000000 | \ argument
220 ((uint32_t)(cell) & 0x7f))
Dft8xx_reference_api.h416 #define VERTEX2II(x, y, handle, cell) FT8XX_VERTEX2II(x, y, handle, cell) argument
/Zephyr-Core-3.5.0/boards/arm64/mimx8mm_evk/doc/
Dindex.rst115 Use Jailhouse hypervisor, after root cell linux is up:
119 #jailhouse enable imx8mm.cell
120 #jailhouse cell create imx8mm-zephyr.cell
121 #jailhouse cell load 1 zephyr.bin -a 0x93c00000
122 #jailhouse cell start 1
/Zephyr-Core-3.5.0/boards/arm64/mimx8mn_evk/doc/
Dindex.rst115 Use Jailhouse hypervisor, after root cell linux is up:
119 #jailhouse enable imx8mn.cell
120 #jailhouse cell create imx8mn-zephyr.cell
121 #jailhouse cell load 1 zephyr.bin -a 0x93c00000
122 #jailhouse cell start 1
/Zephyr-Core-3.5.0/boards/arm64/mimx8mp_evk/doc/
Dindex.rst114 Use Jailhouse hypervisor, after root cell linux is up:
118 #jailhouse enable imx8mp.cell
119 #jailhouse cell create imx8mp-zephyr.cell
120 #jailhouse cell load 1 zephyr.bin -a 0xc0000000
121 #jailhouse cell start 1
/Zephyr-Core-3.5.0/samples/boards/bbc_microbit/sound/boards/
Dbbc_microbit.overlay3 /* period cell corresponds to initial period */
/Zephyr-Core-3.5.0/scripts/dts/python-devicetree/tests/
Dtest.dts18 compatible = "interrupt-three-cell";
30 compatible = "interrupt-one-cell";
35 compatible = "interrupt-two-cell";
40 compatible = "interrupt-three-cell";
56 compatible = "interrupt-one-cell";
62 compatible = "interrupt-two-cell";
68 compatible = "interrupt-three-cell";
101 compatible = "interrupt-two-cell";
/Zephyr-Core-3.5.0/boards/arm64/mimx93_evk/doc/
Dindex.rst168 cell can utilize.
170 * **Root cell**: refers to the cell in which Linux is running. This is the main cell which
173 assigned to the root cell.
176 use are taken from the root cell (the cell Linux is running in).
185 Root cell wants to use the **UART** which let's say has its registers mapped in
/Zephyr-Core-3.5.0/drivers/dma/
DKconfig.stm3243 peripheral request must be specified in the dma slot of the dma cell
45 a parameter of the dma-cell.
/Zephyr-Core-3.5.0/boards/arm64/nxp_ls1046ardb/doc/
Dindex.rst193 jailhouse enable ls1046a-rdb.cell
194 jailhouse cell create ls1046a-rdb-inmate-demo.cell
195 jailhouse cell load 1 zephyr.bin --address 0xc0000000
196 jailhouse cell start 1
/Zephyr-Core-3.5.0/samples/boards/bbc_microbit/sound/
DREADME.rst16 board that has a piezo buzzer in addition to a coin-cell battery. Resellers of
/Zephyr-Core-3.5.0/samples/boards/stm32/backup_sram/
DREADME.rst10 NVM when VBAT pin is supplied with a voltage source, e.g. a coin button cell.
/Zephyr-Core-3.5.0/samples/basic/button/
DREADME.rst90 This sample requires a ``pin`` cell in the ``gpios`` property. The ``flags``
91 cell is optional, however, and the sample still works if the GPIO cells
/Zephyr-Core-3.5.0/samples/modules/tflite-micro/magic_wand/train/
Dtrain_magic_wand_model.ipynb72 "Run the following cell to ensure the correct version of TensorFlow is used."
193 …"The following cell will begin the training process. Training will take around 5 minutes on a GPU …
220 …"In the following cell, we convert this model into a C++ source file we can use with TensorFlow Li…
/Zephyr-Core-3.5.0/samples/sensor/max17262/
DREADME.rst17 ModelGauge m5 algorithm. The IC monitors a single-cell battery pack and
/Zephyr-Core-3.5.0/boards/arm/contextualelectronics_abc/
Dcontextualelectronics_abc.dts13 compatible = "nordic,nrf52840-ble-cell";

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